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EVAL-AD5326DBZ User Guide 

UG-977 

 

Rev. 0 | Page 7 of 14 

EVALUATION BOARD SCHEMATICS AND ARTWORK 

EVAL-MBnanoDAC-SDZ

 MOTHERBOARD 

 

14448-

008

EXT_VDD

VLOGIC

GND

EXT_VSS

CONNECTOR

STANDARD

SDP

PARALLEL

PORT

SPORT

SPI

I2C

GENERAL

INPUT/OUTPUT

TIMERS

*NC ON BLACKFIN SDP

120

NC

119

NC

118

GND

117

GND

116

VIO(+3.3V)

115

GND

114

*PAR_D22

113

*PAR_D20

112

*PAR_D18

111

*PAR_D16

110

PAR_D15

109

GND

108

PAR_D12

107

PAR_D10

106

PAR_D8

105

PAR_D6

104

GND

103

PAR_D4

102

PAR_D2

101

PAR_D0

100

99

98

GND

97

PAR_A2

96

PAR_A0

95

PAR_FS2

94

PAR_CLK

93

GND

92

SPORT_RSCLK

91

SPORT_DR0

90

SPORT_RFS

89

SPORT_TFS

88

SPORT_DT0

87

SPORT_TSCLK

86

GND

85

SPI_SEL_A

84

SPI_MOSI

83

SPI_MISO

82

SPI_CLK

81

GND

80

SDA_0

79

SCL_0

78

GPIO1

77

GPIO3

76

GPIO5

75

GND

74

GPIO7

73

TMR_B

72

TMR_D

71

CLK_OUT

70

NC

69

GND

68

NC

67

NC

66

NC

65

WAKE

64

SLEEP

63

GND

62

UART_TX

61

BMODE1

60

RESET_IN

59

UART_RX

58

GND

57

RESET_OUT

56

EEPROM_A0

55

NC

54

NC

53

NC

52

GND

51

NC

50

NC

49

TMR_C*

48

TMR_A

47

GPIO6

46

GND

45

GPIO4

44

GPIO2

43

GPIO0

42

SCL_1

41

SDA_1

40

GND

39

SPI_SEL1/SPI_SS

38

SPI_SEL_C

37

SPI_SEL_B

36

GND

35

SPORT_INT

34

SPI_D3*

33

SPI_D2*

32

SPORT_DT1

31

SPORT_DR1

30

SPORT1_TDV*

29

SPORT0_TDV*

28

GND

27

PAR_FS1

26

PAR_FS3

25

PAR_A1

24

PAR_A3

23

GND

22

PAR_CS

21

PAR_RD

20

PAR_D1

19

PAR_D3

18

PAR_D5

17

GND

16

PAR_D7

15

PAR_D9

14

PAR_D11

13

PAR_D13

12

PAR_D14

11

GND

10

PAR_D17*

9

PAR_D19*

8

PAR_D21*

7

PAR_D23*

6

GND

5

USB_VBUS

4

GND

3

GND

2

NC

1

VIN

J10

1

A0

2

A1

3

A2

4

VSS

8

VCC

7

WP

6

SCL

5

SDA

U3

24LC32

R2

100kΩ

R4

DNP

R3

100kΩ

DGND

AGND

L1

BEAD

R1

1.6Ω

+

C11

4.7µF

C10

0.1µF

+

C7
10µF

1

VIN

2

GND

3

EN

4

NC

5

VOUT

U2

ADP121-AUJZ33

C3

1µF

C4

1µF

C

B

A

LK5

J6-1

J6-2

C5

0.1µF

+

C6

10µF

A

B

LK6

J5-1

J5-2

J5-3

C2

0.1µF

+

C1

10µF

A

B

LK7

R7

100Ω

R5

100Ω

R6

100Ω

R8

100Ω

R9

100Ω

R10

100Ω

R11

100Ω

R12

100Ω

R13

100Ω

R14

100Ω

C8

0.1µF

+

C9

10µF

R15

100Ω

R16

DNP

PD

SCL
SDA

CS

WR
DB0
DB2
DB4

DB6
DB8
DB10

DB1
DB3
DB5

DB7
DB9

DB11

+3.3V

+3.3V

DGND

+5V

USB_VBUS

USB_VBUS

+3.3V

VDD

+3.3V

DGND

VLOGIC

DGND

+3.3V

DGND

DGND

VSS

+5V

CLR
LDAC

SCLK
SDO
SDIN
SYNC

EXT_VDD

EXT_VDD

+5V

DGND

DGND

DGND

DGND

DGND

DGND

 

Figure 8. Motherboar

SDP-B

 Connector and Power Supply 

 

14448-

009

EX_REF_1

EX_REF_2

EX_REF_3

EX_REF_4

VREF_1

VREF_2

VREF_3

VREF_4

D

C

A

B

E

REF3

D

C

A

B

E

REF4

D

C

A

B

E

REF1

D

C

A

B

E

REF2

+5VREF

+2_5VREF

+4_096VREF

VREF1

+5VREF

+2_5VREF

+4_096VREF

VREF2

+5VREF

+2_5VREF

+4_096VREF

VREF3

+5VREF

+2_5VREF

+4_096VREF

VREF4

VDD

VDD

VDD

VDD

+2.5V

+4.096V

C16

1µF

C15

1µF

6

OUTPUT

2

VS

3

SLEEP

4

GND

U6

REF198

C17

1µF

+5V

+2.5V

+4.096V

2

VIN

5

TRIM

6

VOUT

4

GND

U4

ADR445ARMZ

2

VIN

4

GND

5

TRIM

7

COMP

6

VOUT

U5

ADR431BRZ

+5VREF

+2_5VREF

+4_096VREF

VDD

VDD

VDD

 

Figure 9. Motherboard Reference Voltage Selector Circuit 

 

Summary of Contents for EVAL-AD5326DBZ

Page 1: ...IRED EVAL SDP CB1Z board SDP B controller board must be purchased separately GENERAL DESCRIPTION This user guide details the operation of the evaluation board for the AD5326 quad channel voltage output DAC The evaluation board is designed to help users quickly prototype new AD5326 circuits and reduce design time The AD5326 operates from a single 2 5 V to 5 5 V supply Full data is available in the ...

Page 2: ...ry 2 Evaluation Board Hardware 3 Power Supplies 3 Motherboard Link Options 3 Daughter Board Link Options 3 Evaluation Board Software Quick Start Procedures 4 Installing the Software 4 Running the Software 4 Software Operation 5 Evaluation Board Schematics and Artwork 7 EVAL MBnanoDAC SDZ Motherboard 7 EVAL AD5326DBZ Daughter Board 11 Ordering Information 13 Bill of Materials 13 REVISION HISTORY 3 ...

Page 3: ...he evaluation board imprints see Figure 12 Table 2 Link Options Setup for SDP B Control Default Link Number Position REF1 2 5V REF2 EXT REF3 EXT REF4 EXT LK5 C LK6 3 3V LK7 B DAUGHTER BOARD LINK OPTIONS The EVAL AD5340DBZ daughter board has two link options These links set the least significant bits LSBs of the I2 C addresses of the DAC Table 3 describes the function of these links Set LK1 and LK2...

Page 4: ...ng the USB cable included in the evaluation kit 6 When the software detects the EVAL AD5326DBZ proceed through any dialog boxes that appear to finalize the installation RUNNING THE SOFTWARE To run the program do the following 1 Connect the evaluation board to the SDP B board and connect the USB cable between the SDP B board and the PC 2 Power up the evaluation board as described in the Power Suppl...

Page 5: ...high or low by clicking HIGH or LOW in the LDAC box Power Down Control All of the DACs can be powered down simultaneously A selection box allows the device to operate in normal mode or power down mode Click the blue progressive disclosure button in the Power Down Logic block to access the Powerdown Configuration window as shown in Figure 5 Click OK to write the appropriate values to the AD5326 whe...

Page 6: ...ffer of each of the DACs can be set individually Click the blue progressive disclosure button in the I2C box to access the Buffer Config window as shown in Figure 7 Select the buffer setting and click on OK to apply the DAC configuration 14448 007 Figure 7 Buffer Configuration Window ...

Page 7: ...R_CS 21 PAR_RD 20 PAR_D1 19 PAR_D3 18 PAR_D5 17 GND 16 PAR_D7 15 PAR_D9 14 PAR_D11 13 PAR_D13 12 PAR_D14 11 GND 10 PAR_D17 9 PAR_D19 8 PAR_D21 7 PAR_D23 6 GND 5 USB_VBUS 4 GND 3 GND 2 NC 1 VIN J10 1 A0 2 A1 3 A2 4 VSS 8 VCC 7 WP 6 SCL 5 SDA U3 24LC32 R2 100kΩ R4 DNP R3 100kΩ DGND AGND L1 BEAD R1 1 6Ω C11 4 7µF C10 0 1µF C7 10µF 1 VIN 2 GND 3 EN 4 NC 5 VOUT U2 ADP121 AUJZ33 C3 1µF C4 1µF C B A LK5 ...

Page 8: ...DB8 DB9 DB0 DB1 DB2 DB3 VOUT_0 VOUT_1 VOUT_2 VOUT_3 VOUT_4 VOUT_5 VOUT_6 VOUT_7 SCL SDA DGND VLOGIC SCL SDA DGND VLOGIC SYNC SDO SDIN SCLK DGND VLOGIC PD GAIN DGND LDAC CLR VLOGIC DGND CS WR DB11 DB5 DB10 DB4 AGND Figure 10 Motherboard Connectors to Daughter Board and Serial Interface 14448 011 VOUT_0 VOUT_1 VOUT_2 VOUT_3 VOUT_4 VOUT_5 VOUT_6 VOUT_7 3 2 1 U10 A AD8608ARUZ 5 6 7 U10 B AD8608ARUZ 10...

Page 9: ...EVAL AD5326DBZ User Guide UG 977 Rev 0 Page 9 of 14 14448 012 Figure 12 Motherboard Component Placement 14448 013 Figure 13 Motherboard Top Side Routing ...

Page 10: ...UG 977 EVAL AD5326DBZ User Guide Rev 0 Page 10 of 14 14448 014 Figure 14 Motherboard Bottom Side Routing ...

Page 11: ... LDAC 2 VDD 3 VOUTA 4 VOUTB 5 VOUTC 6 VREFA 7 VREFB 8 VREFC 9 VREFD 10 PD 11 VOUTD 12 GND 13 SDA 14 SCL 15 A0 16 A1 U1 AD5326BRUZ LDAC VREF1 VREF2 VREF3 VREF4 PD SDA SCL VDD VOUT_0 VOUT_1 VOUT_2 VOUT_3 VDD VDD VREF1 VREF2 VREF3 VREF4 VLOGIC SDA SCL SYNC SCLK SDO SDIN LDAC CLR PD GAIN VOUT_0 VOUT_1 VOUT_2 VOUT_3 VOUT_4 VOUT_5 VOUT_6 VOUT_7 DB6 DB7 DB8 DB9 DB0 DB1 DB2 DB3 DGND CS WR DB11 DB5 DB10 DB...

Page 12: ...UG 977 EVAL AD5326DBZ User Guide Rev 0 Page 12 of 14 14448 018 Figure 18 Daughter Board Bottom Side Routing ...

Page 13: ...09 1 J10 120 way connector FEC 1324660 1 L1 Inductor SMD 600 Ω FEC 9526862 1 LK5 6 pin 3 2 0 1 inch header and shorting block FEC 148 535 and 150 411 36 pin strip 2 LK6 LK7 4 pin 2 2 0 1 inch header and shorting block FEC 148 535 and 150 411 36 pin strip 4 REF1 REF2 REF3 REF4 10 pin 5 2 0 1 inch header and shorting block FEC 1022227 and 150 411 1 R1 Resistor surge 1 6 Ω 1 0603 FEC 1627674 2 R2 R3 ...

Page 14: ...sign sublicense or distribute the Evaluation Board and ii permit any Third Party to access the Evaluation Board As used herein the term Third Party includes any entity other than ADI Customer their employees affiliates and in house consultants The Evaluation Board is NOT sold to Customer all rights not expressly granted herein including ownership of the Evaluation Board are reserved by ADI CONFIDE...

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