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EVAL-AD5340DBZ User Guide 

UG-981 

 

Rev. 0 | Page 7 of 13 

EVALUATION BOARD SCHEMATICS AND ARTWORK 

EVAL-MBnanoDAC-SDZ

 MOTHERBOARD 

 

Figure 8. 

EVAL-MBnanoDAC-SDZ

 Motherboard 

SDP-B

 Connector and Power Supply 

EXT_VDD

VLOGIC

GND

EXT_VSS

SDP

STANDARD

CONNECTOR

PARALLEL

PORT

SPORT

SPI

I2C

GENERAL

INPUT/OUTPUT

TIMERS

*NC ON BLACKFIN SDP

120

NC

119

NC

118

GND

117

GND

116

VIO(+3.3V)

115

GND

114

PAR_D22*

113

PAR_D20*

112

PAR_D18*

111

PAR_D16*

110

PAR_D15

109

GND

108

PAR_D12

107

PAR_D10

106

PAR_D8

105

PAR_D6

104

GND

103

PAR_D4

102

PAR_D2

101

PAR_D0

100

PAR_WR

99

PAR_INT

98

GND

97

PAR_A2

96

PAR_A0

95

PAR_FS2

94

PAR_CLK

93

GND

92

SPORT_RSCLK

91

SPORT_DR0

90

SPORT_RFS

89

SPORT_TFS

88

SPORT_DT0

87

SPORT_TSCLK

86

GND

85

SPI_SEL_A

84

SPI_MOSI

83

SPI_MISO

82

SPI_CLK

81

GND

80

SDA_0

79

SCL_0

78

GPIO1

77

GPIO3

76

GPIO5

75

GND

74

GPIO7

73

TMR_B

72

TMR_D

71

CLK_OUT

70

NC

69

GND

68

NC

67

NC

66

NC

65

WAKE

64

SLEEP

63

GND

62

UART_TX

61

BMODE1

60

RESET_IN

59

UART_RX

58

GND

57

RESET_OUT

56

EEPROM_A0

55

NC

54

NC

53

NC

52

GND

51

NC

50

NC

49

TMR_C*

48

TMR_A

47

GPIO6

46

GND

45

GPIO4

44

GPIO2

43

GPIO0

42

SCL_1

41

SDA_1

40

GND

39

SPI_SEL1/SPI_SS

38

SPI_SEL_C

37

SPI_SEL_B

36

GND

35

SPORT_INT

34

SPI_D3*

33

SPI_D2*

32

SPORT_DT1

31

SPORT_DR1

30

SPORT1_TDV*

29

SPORT0_TDV*

28

GND

27

PAR_FS1

26

PAR_FS3

25

PAR_A1

24

PAR_A3

23

GND

22

PAR_CS

21

PAR_RD

20

PAR_D1

19

PAR_D3

18

PAR_D5

17

GND

16

PAR_D7

15

PAR_D9

14

PAR_D11

13

PAR_D13

12

PAR_D14

11

GND

10

PAR_D17*

9

PAR_D19*

8

PAR_D21*

7

PAR_D23*

6

GND

5

USB_VBUS

4

GND

3

GND

2

NC

1

VIN

J10

1

A0

2

A1

3

A2

4

VSS

8

VCC

7

WP

6

SCL

5

SDA

U3

24LC32

R2

100kΩ

R3

100kΩ

R4

DNP

DGND

AGND

L1

BEAD

R1

1.6Ω

+

C11

4.7µF

C10

0.1µF

+

C7

10µF

1

2

3

4

5

U2

ADP121-AUJZ33

C3

1µF

C4
1µF

C

B

A

LK5

J6-1

J6-2

C5
0.1µF

+

C6

10µF

A

B

LK6

J5-1

J5-2

J5-3

C2

0.1µF

+

C1

10µF

A

B

LK7

R7

100Ω

R5

100Ω

R6

100Ω

R8

100Ω

R9

100Ω

R10

100Ω

R11

100Ω

R12

100Ω

R13

100Ω

R14

100Ω

C8

0.1µF

+

C9

10µF

R15

100Ω

R16

DNP

PD

GAIN

SCL
SDA

CS

WR
DB0
DB2
DB4

DB6
DB8
DB10

DB1
DB3
DB5

DB7
DB9

DB11

+3.3V

+3.3V

DGND

+5V

USB_VBUS

USB_VBUS

+3.3V

VDD

+3.3V

DGND

VLOGIC

DGND

+3.3V

DGND

DGND

VSS

+5V

CLR
LDAC

SCLK
SDO
SDIN
SYNC

EXT_VDD

EXT_VDD

+5V

DGND

DGND

DGND

DGND

DGND

DGND

14516-

008

VIN

GND

EN

NC

VOUT

Summary of Contents for EVAL-AD5340DBZ

Page 1: ...tware HARDWARE REQUIRED EVAL SDP CB1Z board SDP B controller board must be purchased separately GENERAL DESCRIPTION This user guide details the operation of the evaluation board for the AD5340 single...

Page 2: ...ion History 2 Evaluation Board Hardware 3 Power Supplies 3 Link Options 3 Daughter Board Link Options 3 Evaluation Board Software Quick Start Procedures 4 Installing the Software 4 Running the Softwar...

Page 3: ...d Table 4 match the evaluation board imprints see Figure 12 Table 2 Link Options Setup for SDP B Control Default Link Number Position REF1 2 5V REF2 EXT REF3 EXT REF4 EXT LK5 C LK6 3V3 LK7 B DAUGHTER...

Page 4: ...d in the box 5 Proceed through any dialog boxes that appear to finalize the installation when the software detects the EVAL AD5340DBZ evaluation board RUNNING THE SOFTWARE To run the program complete...

Page 5: ...ressive disclosure button on the INTERFACE LOGIC block A window opens that allows the user to click the appropriate LDAC setting as shown in Figure 5 Figure 5 DAC Config Window GAIN Control Set the GA...

Page 6: ...he POWER DOWN LOGIC block to access the selection box which allows the device to operate in normal mode or power down mode A window opens that allows the user to click the Powerdown option for the DAC...

Page 7: ...EEPROM_A0 55 NC 54 NC 53 NC 52 GND 51 NC 50 NC 49 TMR_C 48 TMR_A 47 GPIO6 46 GND 45 GPIO4 44 GPIO2 43 GPIO0 42 SCL_1 41 SDA_1 40 GND 39 SPI_SEL1 SPI_SS 38 SPI_SEL_C 37 SPI_SEL_B 36 GND 35 SPORT_INT 34...

Page 8: ...I PMOD CONNNECTOR GPIO PMOD CONNNECTOR I2C PMOD CONNNECTOR 1 3 5 7 9 2 4 6 8 10 J2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 J1 SDIN SDO SCLK SYNC SCL LDAC CLR PD GAIN SDA 1 2 3 4 5 6 7 8 J9 J8 1 J8 2 J8...

Page 9: ...EVAL AD5340DBZ User Guide UG 981 Rev 0 Page 9 of 13 Figure 12 EVAL MBnanoDAC SDZ Motherboard Component Placement Figure 13 EVAL MBnanoDAC SDZ Motherboard Top Side Routing 14516 012 14516 013...

Page 10: ...4 7 J4 8 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 J1 1 DB10 2 DB11 3 BUF 4 VREF 5 VOUT 6 NC 7 GND 8 9 10 11 12 13 14 VDD 15 DB0 16 DB1 17 DB2 18 DB3 19 DB4 20 DB5 21 DB6 22 DB7 23 DB8 24 DB9 U1 AD5340BR...

Page 11: ...81 Rev 0 Page 11 of 13 Figure 16 EVAL AD5340DBZ Daughter Board Component Placement Figure 17 EVAL AD5340DBZ Daughter Board Top Side Routing Figure 18 EVAL AD5340DBZ Daughter Board Bottom Side Routing...

Page 12: ...FEC 1667509 1 J10 120 way connector FEC 1324660 1 L1 Inductor SMD 600 FEC 9526862 1 LK5 6 pin 3 2 0 1 inch header and shorting block FEC 148 535 and 150 411 36 pin strip 2 LK6 LK7 4 pin 2 2 0 1 inch...

Page 13: ...any entity other than ADI Customer their employees affiliates and in house consultants The Evaluation Board is NOT sold to Customer all rights not expressly granted herein including ownership of the...

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