SSM2304
Rev. 0 | Page 19 of 20
PCB LAYOUT GUIDELINES
To keep the EMI within the allowable limits and ensure that the
amplifier chip operates within the temperature limits, adhere to
the following guidelines.
1.
Place nine vias onto the thermal pad of the amplifier. The
outer diameter of the vias should be 0.5 mm and the inner
diameter should be 0.33 mm. Use a PCB area of at least
2 cm × 2 cm or an equivalent area on the back side of the
PCB layer as the heat sink (see Figure 41, Figure 42, and
Figure 43). If there are internal layers available within the
PCB, allocate an area as large as possible for the ground
plane(s) and connect these vias to the plane(s).
2.
Place the EMI filtering beads, B1, B2, B3, and B4, as close
to the amplifier chip as possible. The same principle applies
to the output inductors, L1, L2, L3, and L4, if they are
included in the application design.
3.
Place C11, C12, C13, and C14, the decoupling capacitors
for the beads, as close to the amplifier chip as possible and
connect their ground terminals together as close as
possible. The same principle applies to the decoupling
capacitors for the inductors, C15, C16, C17, and C18, if
they are included in the application design.
4.
Place C19, the decoupling capacitor for the power supply,
as close to the amplifier chip as possible and connect its
ground terminal directly to the IC’s ground pins, Pins 13
and 16.
5.
Place C20, the decoupling capacitor for the power supply,
as close to the amplifier chip as possible and connect its
ground terminal to the PCB ground area containing the
power supply traces.
6.
Place B5, the bead for the power supply, as close to the
amplifier chip as possible, keeping it on the same side of
the PCB as the chip.
7.
The ferrite beads can block an EMI of up to 160 MHz in
frequency. To eliminate EMIs greater than the 160 MHz,
place a small capacitor, such as 100 pF, in parallel with the
decoupling capacitors, C11, C12, C15, and C16, at least
20 mm from the 1 nF decoupling capacitor. Ideally, the
ground terminals of these capacitors are connected to the
ground terminals or the PCB traces, which are placed as
close to the output loads (loudspeakers) as possible. In this
way, the PCB connecting trace between these two capacitors
serves as an inductor for filtering out the high frequency
component.
8.
Decouple the input port nodes and the digital pins, Pins 3,
4, 5, 8, 9, and 10, with small capacitors, such as 100 pF.
These capacitors are not necessary, but can lower the EMI
from these pins. The ground terminals of these capacitors
should be connected to the chip ground as close as possible
(see Figure 41, Figure 42, and Figure 43).
9.
Ground the unconnected pins, Pins 6 and 7.
10.
Connect the ground pins, Pins 6, 7, 13, and 16, to the
thermal pad and place grounding vias as shown in Figure 41,
Figure 42, and Figure 43.
11.
Use a solid polygon plane on the other side of the PCB for
the area of the vias that are placed on the thermal pad of
the chip (see Figure 44 or Figure 45).
12.
Keep the PCB traces for high EMI nodes on the same side
of the PCB and as short as possible. The high EMI nodes
are Pins 1, 2, 11, and 12 of the SSM2304.
OBSOLETE
