ezTrainer
User Manual
FPGA MADE eAzY
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Anaya Tech Systems Pvt Ltd
Note that all these pins can be made input or output, except GPIO31 which always remains a Global clock input
of the FPGA. Also, signals are shown in pairs above. These can be used as differential pair of signals if needed.
The 32-bit connector location is shown in the board picture in section 1.1. Also note that the entire row of pins
on the board edge are 3.3V, and the entire inner row is 0V. A maximum of 1 Amp of current can be drawn from
this voltage to power your own boards. See also figure below:
5.10 LED INTERFACE
The FPGA pins drive eight general purpose green LEDs as shown in the table below. Drive the FPGA pin high
to lit the LED.
GPIO25
115
77
GPIO26
113
80
GPIO27
112
83
GPIO28
109
86
GPIO29
108
89
GPIO30
107
92
GPIO31/CLOCK
80
95
Table 9:
Signal Names
FPGA Pin
GPIO Connector pin
All outer row pins
All inner rown pins
are 0V
are 3.3V
All center rown pins
are GPIO signals
