Model 2000W1000D
Rev B
33
The –12 V at 5 amps power supply is fed to the A1 Pre-Amplifier, A4-A7 Driver Modules to provide gate
voltage for these modules.
PS2 su23 VDC at 44 amps. PS2 is a switching power supply that automatically sets the AC input
circuits to the correct connections for the line voltage 120-240 VAC, 50-60 Hz.
PS2 su23 VDC to amplifiers A4-A7 to provide the drain voltage for these amplifiers.
3.3 RF AMPLIFIER OPERATION (500 WATT POWER AMPLIFIER
SCHEMATIC, 10045681)
3.3.1
A4 Two-Way Splitter
The Two-Way splitter splits the input signal into two equal-amplitude, equal-phase signals. The amplitude of
each signal is 3–3.5 dB below the input signal when both outputs
are terminated into 50Ω loads.
3.3.2
A5, A6 Four-Way Splitters
Each Four-Way splitter splits the input signal into four equal-amplitude, equal-phase signals. The amplitude
of each signal is 6–6.5dB below the input signal when both outputs are terminated
into 50Ω loads.
3.3.3
A7-A14 Final Amplifiers (Schematic 10045396)
Each A7-A14 Final Amp consists of RF matching circuits, an RF transistor a DC current control circuit, a
DC switching circuit and a fault detection circuit.
The RF input is fed to a 4:1 transformer composed of T1, T2, and T3. The push-pull output signal of the 4:1
transformer is connected to the gates of push-pull connected Q1. The drains of Q1 are connected to a 4:1
transformer composed of T4, T4 and T6. The RF transistor , Q1, has approximately 22.5 VDC applied to the
drains at 4 amps current for the driver and 7 amps current for the finals. The RF stage has approximately 18
dB of gain for the finals and an output compression point of 50 watts or greater from final amplifiers A4-A7.
Voltage comparator U1 senses the presence of the –8 VDC. The output of U1 is high if the –8V supply is
–5.5 or less. The output of U1 pulls low when the –8 volts is present turning on Mosfet Q2 which supplies
the DC voltages to the drain of Q1.
The current through Q1 is monitored by U2. The output of U2 is fed to an op amp (U5) which has a
reference voltage on the non-inverting input and it compares the output of U2 to the reference voltage and
generates an error signal to vary the gate voltage of the RF transistor Q1 which controls the drain current.
U3 is a positive 5V regulator. It supplies DC to the current sense circuit, U2, the op amp, U5, and the fault
detection circuit, U6. SW1 is a thermal switch. It closes at a heat sink temperature of approximately 70
˚
to
protect the module in the event of an over-temperature condition.
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