2192-12132-000-000
For information on each command and examples of using them, please refer to the RedBoot
section (Chapter 2) of the eCos Users Manual that is supplied on the VIPER Development Kit
CD. Not all commands that are listed in the manual are supported, only those that are listed in
the table above.
Detailed Hardware Description
The following section provides a detailed description of the functions provided by the VIPER.
This information may be required during development after you have started adding extra
peripherals or are starting to use some of the embedded features.
Processor
The PXA255 is a low power ARM (version 5TE) instruction set compliant RISC processor. The
PXA255 does not include a floating-point unit, however, the device contains a DSP co-
processor to enhance multimedia applications. The 400MHz PXA255 is driven by a 3.6864 MHz
clock, which is then used to generate all the high-speed clocks within the device.
The processor has two supply inputs: the core is powered from a +0.8 – 1.3V source and the
I/O is powered from +3.3V. These voltages are generated on the VIPER from the main +5V
supply input.
The PXA255 provides a Synchronous DRAM controller, 16-bit flat panel interface, AC97
interface, PC card / CompactFlash interface and a USB client controller.
The PXA255 processor is packaged in 256 ball PBGA, and therefore is attached to the board
during the assembly process.
The PXA255 processor is a low power device so a heat sink is not required to support ambient
temperatures up to 70
°
C (85
°
C for the industrial variant).
Memory
The VIPER includes four types of memory device, the synchronous DRAM system memory,
1MByte bootloader EPROM, the resident Flash array and 256KBytes of SRAM.
Synchronous DRAM Interface
There are two memory configurations supported by the VIPER, these are 16Mbyte and
64MByte of SDRAM. These are surface mount devices soldered to the board and cannot be
upgraded. Regardless of the variant, all of the SDRAM is located in DRAM BANK 0. RedBoot
automatically detects the amount of memory fitted to the board, and configures the SDRAM
controller accordingly.
The SDRAM controller supports running the memory at frequencies between 50MHz and
100MHz, this can be configured to achieve the optimum balance between power consumption
and performance.
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