ARM Instruction Reference
ARM DUI 0068B
Copyright © 2000, 2001 ARM Limited. All rights reserved.
4-77
4.8.5
MAR, MRA
XScale coprocessor 0 instructions.
Transfer between two general-purpose registers and a 40-bit internal accumulator.
Syntax
MAR{
cond
}
Acc
,
RdLo
,
RdHi
MRA{
cond
}
RdLo
,
RdHi
,
Acc
where:
cond
is an optional condition code (see
Conditional execution
on page 4-4).
Acc
is the internal accumulator. The standard name is
acc
x
, where
x
is an
integer in the range 0-
n
. The value of
n
depends on the processor. It is 0
for current processors.
RdLo
,
RdHi
are general-purpose registers.
Usage
The
MAR
instruction copies the contents of
RdLo
to bits[31:0] of
Acc
, and the least
significant byte of
RdHi
to bits[39:32] of
Acc
.
The
MRA
instruction:
•
copies bits[31:0] of
Acc
to
RdLo
•
copies bits[39:32] of
Acc
to
RdHi
•
sign extends the value by copying bit[39] of
Acc
to bits[31:8] of
RdHi
.
Architectures
These instructions are only available in XScale.
Examples
MAR acc0,r0,r1
MRA r4,r5,acc0
MARNE acc0,r9,r2
MRAGT r4,r8,acc0
