Artesyn Embedded Technology 6806800R89E, Assembly, Installation And Use

Page 1: ...SharpMedia PCIE 8120 Installation and Use P N 6806800R89F November 2016...

Page 2: ...an Artesyn website The text itself may not be published commercially in print or electronic form edited translated or otherwise altered without the permission of Artesyn It is possible that this publ...

Page 3: ...31 3 Hardware Preparation and Installation 33 3 1 Unpacking and Inspecting the Card 33 3 2 Environmental Thermal and Power Requirements 34 3 2 1 Environmental and Thermal Requirements 34 3 2 2 Power R...

Page 4: ...8120 Card Edge Connector 62 A 2 J1 J2 External Ethernet Connector status LEDs not available on N versions 63 A 3 P2 External ATX 6 Pin Power Connector only on N versions 64 A 4 Debug Connectors 64 A...

Page 5: ...2 DDR3 Memory Subsystem 88 B 9 3 Ethernet MAC Engines 89 B 9 4 Boot Controller 89 B 9 5 DSP Configuration 89 B 9 6 DSP 25MHz Clock Synchronization 90 B 9 7 OPUS Debug Port 91 C Known Issues 93 C 1 Oct...

Page 6: ...ctasic Tools Package 105 F Install and Configure PCIE 8120 in MaxCore 107 F 1 Installing Software and Configuring a SharpMedia PCIE 8120 Card in MaxCore 107 G Related Documentation 115 G 1 Artesyn Emb...

Page 7: ...dge Connector Pin out 62 Table A 2 ATX PWR Pinout 64 Table A 3 Optional Fan Unit Connector Pinout 65 Table B 1 Card Variant MOD_ID 80 Table B 2 Sensor alert default values 85 Table B 3 LED Error Code...

Page 8: ...SharpMedia PCIE 8120 Installation and Use 6806800R89F 8 List of Tables...

Page 9: ...d Block Diagram SharpMedia PCIE 8120 A04 68 Figure B 3 Card Block Diagram SharpMedia PCIE 8120 A12 N V12 N 69 Figure B 4 Card Reset Diagram 70 Figure B 5 Board Power Supply Architecture 71 Figure B 6...

Page 10: ...SharpMedia PCIE 8120 Installation and Use 6806800R89F 10 List of Figures...

Page 11: ...tion Development on page 53 includes application development kit octasic Digital Signal Processor DSP firmware image creation and 12xDSP audio transcode demo application Appendix A SharpMedia PCIE 812...

Page 12: ...gic Device DDR Double Data Rate DHCP Dynamic Host Configuration Protocol DRAM Dynamic Random Access Memory DSP Digital Signal Processor EMC Electromagnetic Compatibility EMV Elektromagnetische Vertr g...

Page 13: ...with DSP 2224M PCI Peripheral Component Interconnect PCI E Peripheral Component Interconnect Express PHY Physical Layer Access Device SELV Safety Extra Low Voltage SerDes Serializer Deserializer SGMI...

Page 14: ...edforon screenoutputandcoderelatedelements or commands in body text Courier Bold Used to characterize user input and to separate it from system output Reference Used for references and for table and f...

Page 15: ...encountered Pay attention to important information Notation Description Part Number Publication Date Description 6806800R89F November 2016 Added few commands in Table 4 1 on page 44 6806800R89E Septe...

Page 16: ...SharpMedia PCIE 8120 Installation and Use 6806800R89F About this Manual 16 About this Manual...

Page 17: ...d by Artesyn Embedded Technologies or persons qualified in electronics or electrical engineering are authorized to install remove or maintain the product The information given in this manual is meant...

Page 18: ...adio frequency emissions compliance is maintained Operation Product Damage Surface of the Product High humidity and condensation on the product surface causes short circuits Do not operate the product...

Page 19: ...tion to the card and or PCB Cabling and Connectors Product Damage The RJ 45 connector s on the card are twisted pair Ethernet TPE or interfaces Connecting an E1 T1 J1 line to an Ethernet connector may...

Page 20: ...SharpMedia PCIE 8120 Installation and Use 6806800R89F Safety Notes 20...

Page 21: ...h bitte an die f r Sie zust ndige Gesch ftsstelle von Artesyn Embedded Technologies Das System erf llt die f r die Industrie geforderten Sicherheitsvorschriften und darf ausschlie lich f r Anwendungen...

Page 22: ...es durchgef hrt werden k nnen dazu f hren dass der Anwender die Genehmigung zum Betrieb des Produktes verliert Boardprodukte werden in einem repr sentativen System getestet um zu zeigen dass das Board...

Page 23: ...reiben m ssen Sie sicher stellen dass das Ger t ber eine Zwangsk hlung verf gt Fehlerhafter Datenbestand Wenn sie die Spannungsversorgung des Produkts abschalten w hrend Programmdaten im Flashspeicher...

Page 24: ...eiden Sie dass das card oder die Platine deformiert oder zerst rt wird Kabel und Stecker Besch digung des Produktes Bei den RJ 45 Steckern die sich an dem Produkt befinden handelt es sich um Twisted P...

Page 25: ...high density DSPs with embedded voice and video firmware from Octasic together with Artesyn s strong embedded system and thermal design skill resulting in an industry leading media processing density...

Page 26: ...o MGW firmware Assembly variants with 4 8 or 12 DSP building blocks External Ethernet port option Supports board control and management functions Internal Ethernet infrastructure capacity 1 2 Software...

Page 27: ...ort software configures the PCIE 8120 card sets up the switches to which DSPs are connected and initializes the card The user application manages the Vocallo media processing services through a packet...

Page 28: ...0950 1 EN 60950 1 IEC 60950 1 CAN CSA C22 2 No 60950 1 Legal safety requirements CISPR 22 CISPR 24 EN 55022 EN 55024 FCC Part 15 Industry Canada ICES 003 VCCI Japan AS NZS CISPR 22 EN 300 386 NEBS Sta...

Page 29: ...Table 1 2 Available Board Variants Marketing Number Number of DSPs Est Max Power 35 o C Est Max Power 55 o C 1 1 In exceptional condition at 55 C system environment for max 96 hours External GbE port...

Page 30: ...280 R281 R282 C232 C258 U17 C5401 C5408 U5400 L5400 C5626 C5621 C5619 C5624 C5625 C5630 C5620 C5627 P1 R1 R844 R845 R846 R275 C923 C84 C85 C907 C908 C963 R343 C932 U5006 C926 C6410 C6422 R6433 C6425 C...

Page 31: ...orts provided for direct traffic termination In this configuration packets for transcode can bypass the host computer entirely while a special Network Address Translation NAT device makes the board ap...

Page 32: ...Functional Description SharpMedia PCIE 8120 Installation and Use 6806800R89F 32...

Page 33: ...t perform the following steps 1 Verify that you have received all items of your shipment SharpMedia PCIE 8120 card One printed copy of Quick Start Guide One printed copy of Safety Notes Summary Any op...

Page 34: ...rd when operated in your particular system configuration meets the environmental requirements specified below The card is thoroughly inspected before shipment If any damage has occurred during transpo...

Page 35: ...able 3 1 Environmental and Thermal Requirements Requirement Operating Non Operating Temperature 0 C to 40 C system ambient exceptional max 55 C for max 96 hours 40 C to 70 C Forced Air Flow Recommende...

Page 36: ...en into operation if the full 75W supply is not available An external ATX power connector option is available only for NEBS variant For this you need to order a PCIE 8120 card with an external power c...

Page 37: ...rpMedia PCIE 8120 card from the rack mount server 1 Make sure you are in an ESD safe environment 2 Remove any cable that is connected to the card 3 Power off the system before removing the card 4 Gent...

Page 38: ...Hardware Preparation and Installation SharpMedia PCIE 8120 Installation and Use 6806800R89F 38...

Page 39: ...your local Artesyn Embedded Technologies support personnel to get them installed on your host PCIE 8120 support package PCIE8120 version zip Octasic software package octasic sdk version zip Documenta...

Page 40: ...ernatively to the commands rpm ihv you can use yum localinstall pcie8120 1 8 1 1 el7 centos x86_64 rpm yum localinstall sofia sip 1 12 11 1 el7 centos x86_64 rpm yum localinstall octasic sdk 3 00 01 B...

Page 41: ...library opt bladeservices modules ContainsSharpMediaPCIE 8120 kernel module opt bladeservices share octasic Contains specific configuration files to create firmware images for the DSPs Folder Descript...

Page 42: ...dy installed and configured on the system The octSetup tool from the support software serves for setting up a standard configuration on both DHCP and TFTP servers locally on the system When the DSP ha...

Page 43: ...dd and Card denotes number of the card By default the first card takes the value as zero and it increments by 1 for each card For example assume that 192 168 100 1 is a sample IP address For the first...

Page 44: ...nTable Octasic Tools Package Directory Structure on page 105 Once the DSP firmware is loaded you can execute the demo application octService start all 4 4 4 Command Line Utility Octmezz is the Command...

Page 45: ...ault priority setvlan vid untag map fwd map Set VLAN table entry getvlan vid Get VLAN table entry unsetvlan vid Invalidate VLAN table entry listvlans all Lists VLAN table portvlan vid ports Defines VL...

Page 46: ...N Writes MAC addresses into ARL tables Parameter key Defines VLAN parameter i2cctrl cmd dev args cmd read write list I2C bus operation Reads from device Writes to device Lists known devices mfactrl cm...

Page 47: ...octmezz tool commands help Displays octmezz help message octmezz help Devicenames Displays list of PCIE 8120 devices available in the host system octmezz listdev names Port Status Lists the status of...

Page 48: ...present on the PCIE 8120 board hosting cpld0 device octmezz dev cpld0 i2cctrl list Temperature Sensors Reads inlet temperature sensor of the PCIE 8120 board hosting cpld0 device octmezz dev cpld0 i2cc...

Page 49: ...for starting or stopping the DSPs available on PCIE8120 cards pcie8120 init Initializes and configures all the available PCIE8120 cards on the host system pcie8120 read sensor Provides data of all th...

Page 50: ...Associate the interface with device function MSW example output pcie8120 listdev PCIE 8120 A12 V12 0 MSW0 05 00 0 eth6 CPLD0 05 00 1 eth7 VSW0 05 00 2 eth5 The MAC address of this network interface he...

Page 51: ...tput is provided Loop 0 VOC TERM MC STATISTICS DSP 00 RxOutPktCnt 2457645 RxInSidPktCnt 0 RxNoPktCnt 2448744 RxBadPktTypeCnt 0 RxBadRtpPayloadTypeCnt 0 RxBadPktHdrFormatCnt 0 RxBadPktLengthCnt 0 RxMis...

Page 52: ...t 0 RxToneRelayUnsupportedCnt 0 TxToneRelayEventPktCnt 0 TxApiEventCnt 0 TxNoRtpEntryPktDropCnt 0 ConnectionWaitAckFlag 0 RxMipsProtectionDropCnt 0 TxMipsProtectionDropCnt 0 CallTimerMsec 61665 Note T...

Page 53: ...Artesyn Embedded Technologies provides all the Octasic information to enable you to commence application development The following information is included in the application development tool kit Octas...

Page 54: ...plugins File location opt octasic Documentation from octasic is provided inside the tool folders 5 2 Octasic DSP Firmware image Every Octasic DSP on the SharpMedia PCIE 8120 card loads the firmware co...

Page 55: ...ctory defaults are var lib tftpboot or tftproot This write operation occurs when either the Stage2 process completes successfully just prior to entering the application or when an error is encountered...

Page 56: ...File Name oct2200_boot_img_gen File Location opt octasic bin Syntax oct2200_boot_img_gen input file output file Input file simplified CSV description file created for PCIE 8120 Output file firmware im...

Page 57: ...irmware build and the files that should be configured with reference to the application The input file octvocmgw citadelle csv includes a TAR file called octvocfs tar The tar file contains two files l...

Page 58: ...ataSamplingMode Value FromTdmTsstBufferSizeMs Value ToTdmTsstBufferSizeMs Value FromTdmBitOffset Value ToTdmBitOffset Value NumStream Value StreamFrequency Value Loopback Value TdmDataResolution Value...

Page 59: ...created a new firmware image you should copy it to the tftpboot folder For details about how to copy firmware image to the tftpboot folder see Executing Demo on page 50 To load the new firmware image...

Page 60: ...nt SharpMedia PCIE 8120 Installation and Use 6806800R89F 60 For details about how to use the demo see README_max_channel_tests txt file at the opt octasic application sample octvoc 12dsp_audio_transco...

Page 61: ...8120 External Connectors This section describes the pin assignments and signals for the connectors on the SharpMedia PCIE 8120 card The following figure shows the top and bottom view layout of the Sha...

Page 62: ...ent Bus clock JTAG2 TCK Test Clock clock input for JTAG interface 6 SMDAT SMBus System management Bus data JTAG3 TDI Test Data Input 7 GND Ground JTAG4 TDO Test Data Output 8 3 3V 3 3V power JTAG5 TMS...

Page 63: ...ferential pair Lane 1 RSVD Reserved 20 PETn1 GND Ground 21 GND Ground PERp1 Receiver differential pair Lane 1 22 GND Ground PERn1 23 PETp2 Transmitter differential pair Lane 2 GND Ground 24 PETn2 GND...

Page 64: ...the P2 connector see PCI Express x16 Graphics 150W ATX Specification document listed in Table Octasic Tools Package Directory Structure on page 105 A 4 Debug Connectors The SharpMedia PCIE 8120 card...

Page 65: ...in header provides 12V supply for this purpose An additional buffer circuitry allows for PWM fan speed control via the CPLD Molex 3 pin header 53398 0371 pico blade series 12V 200mA max PWM drive capa...

Page 66: ...SharpMedia PCIE 8120 External Connectors SharpMedia PCIE 8120 Installation and Use 6806800R89F 66...

Page 67: ...section describes the key hardware components of the SharpMedia PCIE 8120 card B 1 SharpMedia PCIE 8120 Card Block Diagrams The following figures provide an overview of the main function blocks of th...

Page 68: ...SharpMedia PCIE 8120 Hardware Description SharpMedia PCIE 8120 Installation and Use 6806800R89F 68 Figure B 2 Card Block Diagram SharpMedia PCIE 8120 A04...

Page 69: ...SharpMedia PCIE 8120 Hardware Description SharpMedia PCIE 8120 Installation and Use 6806800R89F 69 Figure B 3 Card Block Diagram SharpMedia PCIE 8120 A12 N V12 N...

Page 70: ...hitecture The following figure provides an overview of SharpMedia PCIE 8120 card reset architecture Figure B 4 Card Reset Diagram PHY 88E1512 PCIe x4 card edge connector PHY 88E1512 PHY 88E1111 PHY 88...

Page 71: ...tion on CPLD refer to Logic Design Specification PCIE 8120 2012 1206874M02A listed in Table Related Specifications on page 115 For timing requirements on PERST signal refer to PCI Express Card Electro...

Page 72: ...V P Sensors on page 83 Card power management control by CPLD see Card Power Management on page 79 According to the PCI Express Card Electromechanical Specification Rev 2 0 2007 PCISIG CEM 2 04 11 2007...

Page 73: ...lent types 23ppm tolerance Clock buffer device is TI CDCLVC1112 B 5 Ethernet NIC The SharpMedia PCIE 8120 uses Intel 82580EB DB Gigabit Ethernet Controller to implement PCI Express connectivity and th...

Page 74: ...em ID set to 0x0016 B 6 Ethernet Switch Unit Based on the variant SharpMedia PCIE 8120 uses one or two 16 Port SerDes Gigabit Ethernet switch devices to allow full bandwidth connectivity between all o...

Page 75: ...7 Port Mapping SharpMedia PCIE 8120 A12 V12 DSP0 DSP1 DSP2 DSP3 DSP4 DSP5 DSP6 DSP7 DSP8 DSP09 DSP10 DSP11 DSP ETH port numbers 2 3 2 3 2 3 2 3 2 3 2 3 2 3 2 3 2 3 2 3 2 3 2 3 Main Switch port number...

Page 76: ...2 3 DSP2 2 3 DSP3 2 3 DSP4 2 3 DSP5 2 3 DSP6 2 3 DSP7 2 3 DSP8 2 3 DSP09 2 3 DSP 2 DSP ETH port numbers 2 3 2 3 2 3 2 3 2 3 2 3 2 3 2 3 2 3 2 3 2 Main Switch port numbers 4 12 10 11 1 14 8 13 15 16 3...

Page 77: ...P1 DSP2 DSP3 DSP4 DSP5 DSP6 DSP7 DSP8 DSP09 DSP10 DSP11 DSP ETH port numbers 2 3 2 3 2 3 2 3 2 3 2 3 2 3 2 3 2 3 2 3 2 3 2 3 Main Switch port numbers 4 12 10 11 1 14 8 13 15 16 3 5 7 9 2 6 Video Switc...

Page 78: ...6 device Cyclone III Family Field update programming through Ethernet API Interfaces 2x GMII via MFA PHY 1 2 connected to VSW default or MSW based on assembly option Interface MFA 1 used as device por...

Page 79: ...ector indicating the system preparing to go into operation or leaving operational mode VPx_PWRGD status signals of the on board DC DC units Based on the status of the input signals the following contr...

Page 80: ...of view It can be used to store the IP address range of a card in the UFM or to reconfigure an exchanged card to respond to the same IP address range than the original card The default value for BASE...

Page 81: ...he Host system via MDIO The CPLD is connected as a slave device on the PCI Express SMBus ID PROM Optional AserialEEPROMisavailableonthePVT_I2Cbusforthepurposeofstoringmanufactureroruser data specific...

Page 82: ...sensors measure the PCB component temperature which allows for the determination of absolute and delta temperature levels on the card A possible sensor fault or a cooling system degradation can also b...

Page 83: ...temperature of the device ADT7461 Device SMB address 0x4C I V P Sensors A current and power monitor device is available on the PVT_I2C bus for surveillance purpose It monitors the 12V bus power and ca...

Page 84: ...alarms It is proposed to use a smart sensor algorithm that collects data from the sensors verifies readingsandcalculateshistory actsquicklyoncriticallevels andstilldoesnotoverloadthelow bandwidth of...

Page 85: ...0W 12V 65W 12V 70W 12V Supply Bus voltage 11 5V 10 V 9V Supply Bus current 4 OCT 1 8A 2 1A 2 5A Supply Bus current 12 OCT 5 Amp 6 5 Amp 7 Amp Card Power 4 OCT 22W 12V 26W 12V 30W 12V Card Power 12 OCT...

Page 86: ...ror Code For 3 4 5 6 and 7 LED NUMBER DESCRIPTION 7 6 5 4 3 Off Off Off Off Off No Error Off Off Off Off On 12V Failed Off Off Off On Off 3 3V Failed Off Off Off On On 2 5V Failed X X On Off Off 1 5V...

Page 87: ...l dev cpldx flasherase cfg 4 Program the CPLD with new firmware image opt bladeservices bin pcie8120 tool dev cpldx flashwrite cfg 0 file_new_cpld_fw_image 5 Powercycle the board B 9 DSP Array The Sha...

Page 88: ...ustom booting capability Precision clock synchronization on external references Various Peripheral Interfaces Ethernet serial parallel hi speed interfaces TDM Flash and so on For details see document...

Page 89: ...r to specify optional device configuration and the application image to load The boot process uses a default device configuration determined by either a lowest common capability and or the BOOT_MODE t...

Page 90: ...01 DSP1 0010 DSP2 0011 DSP3 0100 DSP4 0101 DSP5 0110 DSP6 0111 DSP7 1000 DSP8 1001 DSP9 1010 DSP10 1011 DSP11 DSPx_USER_HW_CONF 7 4 BASE_ID 3 0 A card specific 4bit Base ID can be programmed via the C...

Page 91: ...and Use 6806800R89F 91 B 9 7 OPUS Debug Port A debug port is available for low level debugging of individual DSP units via the vendor specific Opus Studio development suite Opus debug port via connect...

Page 92: ...SharpMedia PCIE 8120 Hardware Description SharpMedia PCIE 8120 Installation and Use 6806800R89F 92...

Page 93: ...xxx not installed This message is a hint and can be ignored as long as you plan only to start the demo If you plan to do some development for the DSPs you should consider installing the optional pack...

Page 94: ...Known Issues SharpMedia PCIE 8120 Installation and Use 6806800R89F 94...

Page 95: ...PCIE 8120 Installation and Use 6806800R89F 95 Miscellaneous D 1 OctSetup Internal Behavior OctSetup sets up the host for the demo The following figure explains the network setup of the host Figure D...

Page 96: ...D 999 for every untagged packet received at a port When the DSP requests an IP address from the DHCP server the server selects an arbitrary IP address from the range 192 168 100 10 21 There is no fixe...

Page 97: ...oot files of the DSPs in the pdevn directories The identification is oct2200 0 for DSP0 of the card oct2200 1 for DSP1 of the card and so on These boot files are links to the firmware image that shoul...

Page 98: ...ontroller Intel Corporation 82580 Gigabit Backplane Connection rev 01 01 00 1 Ethernet controller Intel Corporation 82580 Gigabit Backplane Connection rev 01 01 00 2 Ethernet controller Intel Corporat...

Page 99: ...n certain pairs of ports as given below 0 10 1 11 2 12 3 13 4 14 5 15 6 16 BCM5396 switch chips has 17 ports Out of 17 ports 16 ports port 0 through 15 are connected on PCIE8120 to either DSPs or fron...

Page 100: ...to read RX PAUSE status register octmezz dev msw0 r 0x01 0x18 TX PAUSE and RX PAUSE status registers are the bit fields indicating the status for each 10 100 1000BASE T ports bit0 port0 and bit15 port...

Page 101: ...oad the DSPs with maximum IP to IP channels so that the test is set in pairs of physical DSPs This software code assumes that there are 12 DSPs available and that the code is running on the Xeon serve...

Page 102: ...ut of reset and the image downloaded via TFTP The IP address is not important because the software uses raw sockets to communicate with the DSPs D 7 2 Running Software New features If any of these cou...

Page 103: ...RxBadRtpPayloadTypeCnt 0 RxBadPktHdrFormatCnt 0 RxBadPktLengthCnt 0 RxMisorderedPktCnt 800 RxLostPktCnt 116800 RxBadPktChecksumCnt 0 RxUnderrunSlipCnt 0 RxOverrunSlipCnt 0 RxLastVocoderType 0 RxVocod...

Page 104: ...4 RxToneRelayEventPktCnt 0 RxToneRelayUnsupportedCnt 0 TxToneRelayEventPktCnt 0 TxApiEventCnt 0 TxNoRtpEntryPktDropCnt 0 ConnectionWaitAckFlag 0 RxMipsProtectionDropCnt 0 TxMipsProtectionDropCnt 0 Cal...

Page 105: ...yto interact with and test the target application octliveview Application that displays a graphical view of the target Logical Objects octwireshark Plug ins for Wireshark R dissector to enable parsing...

Page 106: ...dia PCIE 8120 Installation and Use 6806800R89F 106 install sh Linux environment script to install Octasic plug ins for Wireshark R Table E 1 Octasic Tools Package Directory Structure continued Directo...

Page 107: ...tion about MaxCore MC3000 platform go to https www artesyn com computing products product max core F 1 Installing Software and Configuring a SharpMedia PCIE 8120 Card in MaxCore To install the softwar...

Page 108: ...stallation 2 SSF 8120 Uninstallation 3 Update 4 Exit Please enter your choice 3 Enter 1 for SSF 8120 Installation The following actions will be performed after completion of this task Installs require...

Page 109: ...be installed Processing Dependency qt settings for package 1 qt 4 8 5 12 el7_2 x86_64 Package sofia sip x86_64 0 1 12 11 1 will be installed Running transaction check Package qt settings noarch 0 19...

Page 110: ...4 8 5 12 el7_2 x86_64 2 4 Installing sofia sip 1 12 11 1 x86_64 3 4 Installing octasic sdk 3 00 01 1A x86_64 4 4 Verifying sofia sip 1 12 11 1 x86_64 1 4 Verifying 1 qt 4 8 5 12 el7_2 x86_64 2 4 Veri...

Page 111: ...120 x86_64 1 6 3 MC_1 ssf8120repo 207 k Transaction Summary Install 1 Package Total download size 207 k Installed size 1 3 M Downloading packages Running transaction check Running transaction test Tra...

Page 112: ...0f0 enp26s0f1 enp26s0f2 configuring network interface enp26s0f0 999 done setting up boot VLAN done Generating configuration for DHCP service processing card0 26 enp26s0f0 enp26s0f1 enp26s0f2 generated...

Page 113: ...olution Dependencies Resolved Package Arch Version Repository Size Installing ssf_maxcore_smcTLS_rel 8120 x86_64 1 1 0 13 el7 ssf8120repo 74 k Transaction Summary Install 1 Package Total download size...

Page 114: ...Install and Configure PCIE 8120 in MaxCore SharpMedia PCIE 8120 Installation and Use 6806800R89F 114...

Page 115: ...document you are looking for 3 In the Search text box type the product name or document name and click Filter G 2 Related Specifications For additional information refer to the following table for rel...

Page 116: ...OCT2200M Hardware Specifications 2012 OCT2200MDS8000 Octasic system BDI pod OCT SBDI2 OCT2200UG8002 User Guide Vocallo Media Gateway API configuration Guide Octasic Software Package document Boot user...

Page 117: ......

Page 118: ...syn and the Artesyn Embedded Technologies logo are trademarks and service marks of Artesyn Embedded Technologies Inc All other product or service names are the property of their respective owners 2016...