500-003111-000
4-4
Table 4.2-2. Status Register Flags
STATUS REGISTER DATA FORMAT
MSB
D15
D14
D13
D12
D11
D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
CONTROL
BIT
NAME
FUNCTION
D0 *
D1
*
D2
*
D3
*
D4
*
D5
*
D6
SETTLING BUSY H
When set to a "1," this flag indicates that
the input settling sequence is in progress,
and that START SETTLING commands will
be ignored. The START SETTLING
command will be recognized if this flag is
LOW "0."
D7
*
D8
*
D9
*
D10
*
D11
*
D12
*
D13
CONV BUSY H
Writing a "1" to the EN START CMD control
bit causes the D13 flag to be set to "1."
The flag will remain set until the next
conversion has been completed and new
data is available in the Converter Data
Register. (The settling sequence will not
run to completion if this flag is not set.)
D14
*
D15
NEW DATA RDY
When set to a "1," this flag indicates that a
conversion has been completed, and that
data is available in the Converter Data
Register. Reading the ADC DATA register
clears this flag.
*The corresponding Control Register bit is mapped directly to this flag.
M3111/T4.2-2
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