500-003111-000
4-7
Selection of a specific converter gain serves to divide the
jumper-selected Full-Scale Range (FSR) by the selected gain. For example, if a
VMIVME-3111 board has a ±5 V FSR, a gain of x100 would produce an effective
FSR of ±0.05 V.
4.5.2 Channel
Selection
Selection of the analog input channels is controlled by the five least
significant control bits (D00 through D04) of the Control and Status Register (CSR),
by the SEL P3 multiplexer control bit D7, and by the three MODE control bits D8,
D9, and D10. The selection requirements for each input channel are shown in
Table 4.5.2-1.
CSR control bit D7 is used to select either the front panel P3 analog inputs
(D7 = "1"), or the rear panel P2 inputs (D7 = "0"). If the P3 inputs and control Mode-
1 are selected, then CSR control bits D0 through D3 select one of the 16 single-
ended inputs available at that connector.
P2 inputs can be configured as either differential or single-ended
channels. In control Mode-1 the differential configuration is selected, and CSR D0
through D4 selects one of 16 differential input channels.
Each P2 differential input channel occupies the connector pins that
would otherwise be allocated to two single-ended channels. Therefore, if the P2
inputs are configured as
a combination of both differential and single-ended input
channels,
then the two single-ended channels which correspond to each
differential channel are not available as inputs.
Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com