500-003111-000
4-17
4.6.4
External Trigger Operation
The board may be programmed to respond to an external TTL active low
or "zero" pulse. For external trigger operation, the user programs the channel,
mode and Start Settling H bits of the CSR. Do not set the Enable Start Convert H bit
D12 of the CSR, instead set the Enable External Trigger H bit D15 of the CSR to a
"one." An external logic level "zero" trigger pulse of a least 100 ns may then be
input to the board via the P2 connector pin A28. On the board, this input pin for
external trigger is pulled high through a 4.7 k resistor to +5 V. The active low
pulse will initiate a single A/D conversion. At the completion of the conversion, the
new data ready flag will be set high.
In addition to enabling the External Trigger operation in the CSR,
jumpers J41 and J42 must be configured. J41 must be omitted. J42 pin 1 should be
connected to J42 pin 2, which connects the external trigger return (P2 pin C28) to
the board ground. For location of the jumpers, refer to Section 5, Figure 5.4-1.
Be aware that the P2 I/O pins are sometimes used by other boards to
perform different I/O functions. From a systems viewpoint, verify that multiple
drivers/receivers are not using
these
user-defined
P2 I/O lines: P2-A28 and
P2-C28.
4.7
CONTROLLING THE ANALOG OUTPUTS
The analog output channels on the VMIVME-3111 appear to the
controlling processor as two 16-bit data words in the address space assigned to
the VMIVME-3111 board. The communication register map shown in Table 4.1-1
lists the board-relative address of each output channel.
4.7.1
Writing to Outputs
Digital codes are recognized in the Analog Output Registers as 12-bit
binary right-justified data. Data written to the upper four most significant bits
(D12 through D15) will be ignored. Table 4.7.1-1 shows the Digital-to-Analog
Converter (DAC) coding conventions used by the DAC. Each output will respond to
a new code within 15 µs after the code is written to the Output Register.
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