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22

    

1

VMIVME-3126A High Resolution, Isolated Analog-to-Digital Converter Board

channels, the

 SYS RECONFIG 

bit in the BCR will be cleared and

 $0000 

written to the 

BRR. When a VMEbus read indicates

 $0000

, the user knows the 

Reconfiguration Mode

 is 

complete and the board is accessible. Figure 1-3 on page 25 shows the reconfiguration 
flowchart from the user’s standpoint. Reconfiguration of a single channel takes 
approximately 44 msec. Reconfiguring all 16 channels takes approximately 101 msec.

Autozero Mode

The board enters the 

Autozero Mode

 when the

 Autozero 

bit in the BCR is set by the 

user. An input switch disconnects the field inputs and connects analog ground to the 
inputs. The present range of each channel is still active. An average of 1024 samples 
are collected by the DSP and this value is compared to the expected reading for a 
grounded input. The offset coefficient is adjusted by the difference in the two values. 
The advantage of this mode of operation is correcting errors in offset due to 
temperature variations without having to invoke a calibration cycle.

The new offset coefficients are used by the DSP and are not written to the E

2

PROM 

unless the user sets the

 WRITE COEF 

bit in the BCR after this mode is complete. The 

Autozero 

bit in the BCR is reset by the DSP when the new coefficients are determined, 

and is an indication that the board has resumed normal operation. 

NOTE:

 Polling the

 Autozero 

bit in the BCR will adversely affect calculation of the 

new coefficients. The Autozero Operation takes approximately 11 seconds to 
complete. After this time elapse, read the BCR to check that the

 Autozero 

bit has been 

reset.

Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com

Summary of Contents for VMIVME-3136A

Page 1: ...l service in house repair center WE BUY USED EQUIPMENT Sell your excess underutilized and idle used equipment We also offer credit for buy backs and trade ins www artisantg com WeBuyEquipment REMOTE INSPECTION Remotely inspect equipment before purchasing with our interactive website at www instraview com LOOKING FOR MORE INFORMATION Visit us on the web at www artisantg com for more information on ...

Page 2: ...3308 USA 256 880 0444 M 800 322 3616 M Fax 256 882 0859 VMIVME 3136A High Resolution Isolated Analog to Digital Converter Board Product Manual 500 103126 000 Rev D Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com ...

Page 3: ...12090 South Memorial Parkway Huntsville Alabama 35803 3308 USA 256 880 0444 M 800 322 3616 M Fax 256 882 0859 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com ...

Page 4: ...he Next Generation PLC The PLC Connection TURBOMODULE UCLIO UIOD UPLC Visual Soft Logic Control ler VMEaccess VMEbus Access VMEmanager VMEmonitor VMEnet VMEnet II and VMEprobe are trademarks and The I O Experts The I O Systems Experts The Soft Logic Experts and The Total Solutions Provider are service marks of VMIC COPYRIGHT AND TRADEMARKS VMIC All Rights Reserved This document shall not be duplic...

Page 5: ...12090 South Memorial Parkway Huntsville Alabama 35803 3308 USA 256 880 0444 M 800 322 3616 M Fax 256 882 0859 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com ...

Page 6: ...nings 15 Safety Symbols Used in This Manual 16 Chapter 1 Theory of Operation 17 VMEbus Interface 18 Control and Status Registers CSRs 18 Data Registers 18 Modes of Operation 20 Normal Mode 20 Calibration Mode 20 Reconfiguration Mode 21 Autozero Mode 22 Digital Signal Processor DSP 23 Electrically Programmable Read Only Memory EPROM 26 Electrically Erasable Programmable Read Only Memory E2PROM 27 C...

Page 7: ...figuration 44 Four Wire RTD Configuration 45 Chapter 3 Programming 47 General Control Features 48 Addressing Modes and Board Locations 48 Data Transfers 48 Reset Operations and Initialization 48 Control Registers 49 Board Identification Register BIR 50 Board Ready Register BRR 51 Board Control Register BCR 52 Select Channel Register SCR 55 Channel Pass Fail Status Register PFS 55 Target Calibratio...

Page 8: ...Table of Contents 7 Maintenance 1 Maintenance 1 Maintenance Prints 2 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com ...

Page 9: ...VMIVME 3126A High Resolution Isolated Analog to Digital Converter Board 8 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com ...

Page 10: ...and Configuration 35 Figure 2 2 Access and Address Mode Configurations 36 Figure 2 3 Location of User Configuration Jumpers 37 Figure 2 4 P3 and P4 64 Pin DIN Type Connector 39 Figure 2 5 Differential Input Connection 42 Figure 2 6 Single Ended Input Connection 42 Figure 2 7 Three Wire RTD Configuration 44 Figure 2 8 Four Wire RTD Configuration 45 Artisan Technology Group Quality Instrumentation G...

Page 11: ...VMIVME 3126A High Resolution Isolated Analog to Digital Converter Board 10 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com ...

Page 12: ...n Coefficients MSW and LSW 54 Table 3 7 Select Channel Register s Bit Map 55 Table 3 8 Channel Pass Fail Status Register s Bit Map 55 Table 3 9 Target Calibration Voltage Register HI s Bit Map 56 Table 3 10 Target Calibration Voltage Register LO s Bit Map 57 Table 3 11 Firmware Revision Register s Bit Map 58 Table 3 12 EEPROM Writes Register 1 s Bit Map 58 Table 3 13 EEPROM Writes Register 0 s Bit...

Page 13: ...VMIVME 3126A High Resolution Isolated Analog to Digital Converter Board 12 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com ...

Page 14: ...gain coefficients into the DSP during a reset condition The offset and gain coefficients can be recalculated by the user by entering the Calibration Mode Software filtering is also done by the DSP to a user defined cut off frequency The following brief overview of principal features illustrates the flexibility and performance that is available with the VMIVME 3126A board 16 Analog input channels 1...

Page 15: ...2 951 0720 Internet http www vita com EMAIL info vita com For detailed information concerning the physical description and specifications of the VMIVME 3126A High Resolution Isolated Analog to Digital Converter board refer to VMIC s Specification No 800 103126 000 This document is availble from VME Microsystems International Corporation 12090 South Memorial Parkway Huntsville Alabama 35803 3308 20...

Page 16: ...om Live Circuits Operating personnel must not remove product covers Component replacement and internal adjustments must be made by qualified maintenance personnel Do not replace components with power cable connected Under certain conditions dangerous voltages may exist even with the power cable removed To avoid injuries always disconnect power and discharge circuits before touching them Do Not Ser...

Page 17: ...he equipment which normally includes all exposed metal structures Alternating current power line Direct current power line Alternating or direct current power line STOP informs the operator that a practice or procedure should not be performed Actions could result in injury or death to personnel or could result in damage to or destruction of part or all of the system WARNING denotes a hazard It cal...

Page 18: ...26A High Resolution Isolated Analog to Digital Converter board provides 16 independent fully isolated input channels This capability is attained by the principal hardware functions listed below see Figure 1 1 on page 19 for a block diagram of these functions VMEbus Interface Digital Signal Processor EPROM E2 PROM Control Logic Analog Inputs 1 Artisan Technology Group Quality Instrumentation Guaran...

Page 19: ... the registers is shown in Table 1 1 on page 20 The registers are explained in detail in Chapter 3 Programmingg The Control and Status registers begin at offset address XX00 Data Registers The Data Registers offset address begins at XX40 Each channel has a unique location in this 16 word deep buffer The data format for unipolar inputs is binary and the format for bipolar is either offset binary or...

Page 20: ...URN DATA ISOLATED GROUND ISOLATED GROUND 5 V REGULATOR 5 V REGULATOR DC VMEbus INTERFACE RAM ERASABLE PROGRAMMABLE LOGIC DSP E2 PROM DSP BOOT EPROM BARRIER 4 2 5 V REFERENCE ADC ONE OF 16 INDIVIDUAL CHANNELS SHOWN P1 P2 P3 P4 CH_HIGH CH_LO CH_RTD 1 CH_RTD 2 CH_AGND 5 V CH_GUARD ISOLATION X1 DC Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com ...

Page 21: ...o reading and writing to the BRR and writing to the TCVH and TCVL registers The BRR s data appears as 3B00 3B01 for 8 channel option while calibration is active Prior to setting the INIT CAL bit the user Table 1 1 Control and Status Registers Register Mnemonic Description Board ID Register BIR Contains code identifying the board as a VMIVME 3126A Board Ready Register BRR Status indicating when the...

Page 22: ...tion error occurs as described above the BRR will indicate the error per Table 3 4 on page 51 2 If the user has entered at least the minimum and not greater than the maximum number of calibration points and is finished with calibrating the Cal Done bit in the BCR must be set This tells the DSP the user has finished calibration and to calculate the gain and offset coefficients After the DSP is fini...

Page 23: ...cted by the DSP and this value is compared to the expected reading for a grounded input The offset coefficient is adjusted by the difference in the two values The advantage of this mode of operation is correcting errors in offset due to temperature variations without having to invoke a calibration cycle The new offset coefficients are used by the DSP and are not written to the E2 PROM unless the u...

Page 24: ...cted in real time using the calculated gain and offset coefficients All DSP math operations are performed in 32 bit format thereby preserving the high resolution provided by the ADCs Output data is truncated to 16 bits for consistency with reasonable limitations on linearity within the input channel circuitry The Firmware Revision Register contains the current revision of the DSP code A Watchdog T...

Page 25: ... on source Enter the digital representation of the expected result of the calibration voltage into TCVH and TCVL Wait approximately 22 seconds 90 seconds for ranges below 100 mV Set INIT CAL bit in BCR Is the Chan Cal d bit set in the BCR Have you finished calibrating the selected channels Set the Cal Done bit in BCR Does BRR read 0000 Start collecting new data NO NO YES YES NO YES Artisan Technol...

Page 26: ...o SCR Does BRR read 0000 Enter reconfigure code which is enabled in the SCR into each channel s CSR Set SYS RECONFIG bit in the BCR Wait approximately 101 msec to complete reconfiguration Begin reading new data from RAM YES NO Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com ...

Page 27: ... the EPROM There are four main boot pages stored in the EPROM These are the power up reset boot page the main routine boot page the calibration boot page and the reconfiguration boot page Each boot page contains code specifically written for the particular function Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com ...

Page 28: ...termined where the coefficients is written This allows the user to run new correction coefficients from the DSP but not corrupt coefficients stored in the E2PROM Most commercially available E2PROM s have a guaranteed 100 000 write cycles lifetime An EEPROM Writes Register EWR is available to the user indicating how many writes have occurred If this number becomes close to the 100 000 limit it is s...

Page 29: ...ic The control logic consists of the logic required to read and write the RAM and E2PROM initiate ADC conversions and arbitrate between the board and the VMEbus The control logic consists of an EPLD Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com ...

Page 30: ...est The noise in the passband is reduced by filtering and moving the noise energy to frequencies outside this passband Programmable Gain Amplifier PGA The ADC contains an internal PGA with software controlled gains of 1 to 128 in seven binary steps The DSP automatically selects the appropriate gain required for the range selected RTD Excitation The VMIVME 3126A is capable of supplying excitation c...

Page 31: ...noise spread The digital filter for each channel is zeroed after a reconfiguration of that channel This puts the filter in a known state and eliminates illegal filter states Depending on the selected frequency there will be a delay after reconfiguration while the filter settles to the signal present on the inputs OPTO Isolation Optical Isolation is provided on every signal going to or coming from ...

Page 32: ...egister TVC section but with one difference The value entered in the TCVH and TCVL must be expressed as a voltage Therefore to find the input voltage applied multiply the calibration current times 400 and use this value in the equation in the Target Calibration Voltage Register TVC section Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com ...

Page 33: ...32 1 VMIVME 3126A High Resolution Isolated Analog to Digital Converter Board Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com ...

Page 34: ...libration 43 RTD Applications and Configurations 44 Introduction The following sections explain the proper unpacking and installation procedures for the VMIVME 3126A High Resolution Isolated Analog to Digital Converter board Address and node configurations are also discussed 2 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com ...

Page 35: ... unpacked and thoroughly inspected for damage that might have occurred during shipment The board s should be checked for broken components damaged printed circuit board s heat damage and other visible contamination All claims arising from shipping damage should be filed with the carrier and a complete report sent to VMIC together with a request for advice concerning the disposition of the damaged ...

Page 36: ...pervisory and nonprivileged access Jumper functions are illustrated in Figure 2 1 below and Figure 2 2 on page 36 Figure 2 3 belowshows the location of user configurable jumpers Omission of a jumper shorting plug produces a HIGH logic one 1 requirement for the associated control bit Installation of the jumper shorting plug produces a LOW logic zero 0 requirement The factory configuration for the b...

Page 37: ... 33 35 35 Either Supervisory or OR 34 36 E9 E9 34 36 E9 34 36 E9 34 36 33 35 Nonprivileged Nonprivileged E9 38 40 37 39 Short I O Addressing A16 E9 E9 OR 38 40 38 40 37 37 39 39 Standard Addressing A24 ACCESS MODE CONFIGURATIONS ADDRESS MODE CONFIGURATIONS Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com ...

Page 38: ...3 Location of User Configuration Jumpers P1 P2 E9 E10 D1 A32 C32 A1 C1 A1 C1 A32 C32 P4 P3 C32 B32 A32 C1 B1 A1 C32 B32 A32 C1 B1 A1 Denotes Pin 1 A23 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com ...

Page 39: ...es that the board is controlled by the I O controller It is the responsibility of the UIOC to extinguish the front panel LED The DSP will not extinguish the front panel LED after completing self test If the jumper is not installed the DSP will extinguish the front panel LED after completing self test The factory configuration for this jumper is installed Artisan Technology Group Quality Instrument...

Page 40: ...nectors are shown in Figure 2 4 below Each connector is a 64 pin DIN type connector which contains eight analog inputs P1 and P2 are 96 pin DIN connectors Figure 2 4 P3 and P4 64 Pin DIN Type Connector A C ROW Pin No 32 PC BOARD Pin No 1 A C Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com ...

Page 41: ...Ch14_Guard RTD1_Ch14 22 Ch14_Low Ch14_AGND 21 20 Ch6_High RTD2_Ch6 19 Ch6_Guard RTD1_Ch6 18 Ch6_Low Ch6_AGND 17 16 Ch13_High RTD2_Ch13 15 Ch13_Guard RTD1_CH13 14 Ch13_Low Ch13_AGND 13 12 Ch5_High RTD2_Ch5 11 Ch5_Guard RTD1_Ch5 10 Ch5_Low Ch5_AGND 9 8 Ch12_High RTD2_Ch12 7 Ch12_Guard RTD1_Ch12 6 Ch12_Low Ch12_AGND 5 4 Ch4_High RTD2_Ch4 3 Ch4_Guard RTD1_Ch4 2 Ch4_Low Ch4_AGND 1 P2_CAL_High P2_CAL_Re...

Page 42: ... 22 Ch10_Low Ch10_AGND 21 20 Ch2_High RTD2_Ch2 19 Ch2_Guard RTD1_Ch2 18 Ch2_Low Ch2_AGND 17 16 Ch9_High RTD2_Ch9 15 Ch9_Guard RTD1_Ch9 14 Ch9_Low Ch9_AGND 13 12 Ch1_High RTD2_Ch1 11 Ch1_Guard RTD1_Ch1 10 Ch1_Low Ch1_AGND 9 8 Ch8_High RTD2_Ch8 7 Ch8_Guard RTD1_Ch8 6 Ch8_Low Ch8_AGND 5 4 Ch0_High RTD2_Ch0 3 Ch0_Guard RTD1_Ch0 2 Ch0_Low Ch0_AGND 1 P2_CAL_High P2_CAL_Return Artisan Technology Group Qu...

Page 43: ...r case the main pins to connect at the board are High Low and AGND Below Figure 2 5 and Figure 2 6 show examples for the connections for differential and single ended inputs Figure 2 5 Differential Input Connection Figure 2 6 Single Ended Input Connection Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com ...

Page 44: ...his source also has a General Purpose Instrumentation Bus GPIB interface This enables calibration to be handled entirely by a PC commanding the source which determines the voltage to output A recommended multimeter is the Hewlett Packard HP3458A This meter also has a GPIB interface to aid in automating the calibration process The voltages used for calibration do not need to be symmetrical around g...

Page 45: ...nt will flow through RL1 developing a voltage error between inputs CH_H and CH_L The second RTD excitation current is used to compensate for this error by suppling the same current through RL2 Assuming the lead resistances are equal due to being the same material and same length and the RTD sources match the error voltages generated will match and no error voltage will be developed between the inp...

Page 46: ...rement The four wire configuration shown in Figure 2 8 below eliminates any errors associated with lead resistances because no current flows in the measurement leads The board measures only the voltage dropped across the RTD and is insensitive to the length of the lead wires Figure 2 8 Four Wire RTD Configuration P3 or P4 Front Panel Connector RTD1 HIGH LOW AGND RTD OPTIONAL CONFIGURATION RTD2 Art...

Page 47: ...46 2 VMIVME 3126A High Resolution Isolated Analog to Digital Converter Board Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com ...

Page 48: ...h several registers which can be jumpered in either the A16 short I O space or the A24 standard space The board automatically enters self test on powerup This self test consists of writing and reading the onboard RAM verifying that each ADC is functioning correctly and loading the default range calibration coefficients from the E2 PROM Digitized input data is accumulated in a data buffer which con...

Page 49: ...h D8 E0 and D16 data transfers Reset Operations and Initialization All control registers are reset by either a VMEbus system reset or a software reset caused by writing to a bit in the BCR Either reset operation will initialize the self test mode which will perform the following 1 Auto detect 8 or 16 channel option and write the Board ID to the BRR 2 Read write test of the onboard RAM 3 Self test ...

Page 50: ... Select Channel Register SCR Read Write 0008 Channel Pass Fail Status PFS Read Only 000A Target Calibration Voltage Hi TCVH Read Write 000C Target Calibration Voltage Lo TCVL Read Write 000E Firmware Revision Register FRR Read Only 0010 EEPROM Writes Register 1 EWR1 Read Only 0012 EEPROM Writes Register 2 EWR2 Read Only 0014 to 001F Reserved N A 0020 to 003F Control Status Registers CSR0 15 Read W...

Page 51: ... Board Identification Register Bit Definitions Bits 15 through 08 These bits contain the Board ID 3B00 Bits 07 through 01 Reserved Forced to zeroes Bit 00 BIR0 This bit indicates the number of channels It is set to a logic zero 0 for the 16 channel option and is set to a logic one 1 for the 8 channel option Table 3 2 Board ID Register s Bit Map Board ID Register Offset 0000 Read Only Byte Word Bit...

Page 52: ...voltages is three An attempt to calibrate with fewer than three calibration voltages occurred Either enter more calibration voltages or terminate calibration process 5Maximum number of calibration voltages is seven An attempt to calibrate with more than seven calibration voltages occurred After entering the maximum number of calibration voltages the CAL Done bit must be set in the BCR to inform th...

Page 53: ...escribed in Reset Operations and Initialization on page 48 The DSP resets this bit to a logical zero 0 after completing the board reset Bit 13 WRITE COEF When this bit is set the gain and offset coefficients stored in the DSP internal memory are written to the E2 PROM This bit is automatically cleared after the coefficients are written to the E2 PROM Bit 12 COEF Status This is a status bit indicat...

Page 54: ...Flag should be read after waiting for 10 msec Bit 04 USER COEF The user sets this bit if user defined gain and offset coefficients are going to be used This gives the user control of the gain and offset applied to the raw ADC data The user must first write the gain and offset coefficients to the appropriate location XX80 starting address of offset coefficients and XXC0 starting address for gain co...

Page 55: ...ured Bit 02 Chan Cal d This is a status bit set by the DSP after the data for the present calibration voltage is stored This informs the user that additional calibration voltage can be entered The bit is reset by the DSP after each INIT CAL or CAL Done operation Bit 01 INIT CAL This bit is set to a logical one 1 by the user to initiate calibration Also this bit is set for each voltage entered for ...

Page 56: ...tains status after performing open sensor detection Powerup Reset Default 0000 Channel Pass Fail Status Register Bit Definitions Bits 15 through 00 CH 15 0 A logical zero 0 indicates the channel has passed A logical one 1 indicates the channel has failed Default is logic zero 0 Table 3 7 Select Channel Register s Bit Map Select Channel Register Offset 0006 Read Write Byte Word Bit 15 Bit 14 Bit 13...

Page 57: ... 57 shows the LO register The gain and offset coefficients are determined using the values in these registers and the data from the ADC A precision low noise voltage source should be used for the calibration process to ensure the accuracy of the final corrected data Powerup Reset Default 0000 Table 3 9 Target Calibration Voltage Register HI s Bit Map Target Calibration Voltage Register HI Offset 0...

Page 58: ...g Solving for Nadc yields Nadc Ein 232 For the above example Nadc 3999 9999 This number is in two s complement format and would be entered in the TCV register as Target Calibration Voltage HI 3999 Target Calibration Voltage LO 9999 NOTE Due to the way the DSP handles calibration unipolar ranges must use EFSR of their bipolar range For example a unipolar range of 0 to 10 V uses a EFSR of 10 V 20 V ...

Page 59: ...contains the lower 16 bits Table 3 12 below and Table 3 13 on page 59 shows these registers EEPROM Write Register 1 Bit Definitions Bits 15 through 00 EW1 15 0 The upper 16 bits represent the number of times the E2PROM has been written to in hexadecimal format Table 3 11 Firmware Revision Register s Bit Map Firmware Revision Register Offset 000E Read Only Byte Word Bit 15 Bit 14 Bit 13 Bit 12 Bit ...

Page 60: ...for unipolar ranges For unipolar ranges the output is always binary Bit 14 RTD This bit enables the RTD Excitation supply when set to a logical one 1 The default condition is a logic zero 0 Table 3 13 EEPROM Writes Register 0 s Bit Map EEPROM Writes Register 0 Offset 0012 Read Only Byte Word Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 09 Bit 08 EW0_15 EW0_14 EW0_13 EW0_12 EW0_11 EW0_10 EW0_9 EW0...

Page 61: ...e bits to a logical zero 0 Bits 11 through 08 Range Bits 3 0 This field determines the input range for the channel The range code is used by the DSP to determine the channel gain Table 3 15 below shows the range code and associated input voltage range Bits 02 through 00 FC 2 0 This field is the channel s 3 dB cutoff frequency as shown in Table 3 16 on page 61 below The default setting is 111 NOTE ...

Page 62: ...ts are in two s complement 32 bit wide integer format Data Register The corrected and filtered data is placed in locations 0040 to 005F Each location corresponds to each channel starting with Channel 0 The data is a 16 bit integer in the format selected in each CSR Table 3 16 Channel 3 dB Cutoff Frequency 3 dB Frequency FC2 FC1 FC0 0 05 Hz 0 0 0 0 12 Hz 0 0 1 0 30 Hz 0 1 0 0 70 Hz 0 1 1 1 7 Hz 1 0...

Page 63: ...62 3 VMIVME 3126A High Resolution Isolated Analog to Digital Converter Board Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com ...

Page 64: ...nserted into their proper connector location Connector pins are clean and free from contamination No components of adjacent boards are disturbed when inserting or removing the board from the chassis Quality of cables and I O connections If products must be returned contact VMIC for a Return Material Authorization RMA Number This RMA Number must be obtained prior to any return Artisan Technology Gr...

Page 65: ... Digital Converter Board 2 Maintenance Prints User level repairs are not recommended The drawings and diagrams in this manual are for reference purposes only Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com ...

Page 66: ...l service in house repair center WE BUY USED EQUIPMENT Sell your excess underutilized and idle used equipment We also offer credit for buy backs and trade ins www artisantg com WeBuyEquipment REMOTE INSPECTION Remotely inspect equipment before purchasing with our interactive website at www instraview com LOOKING FOR MORE INFORMATION Visit us on the web at www artisantg com for more information on ...

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