19
4317I–AVR–01/08
AT90PWM2/3/2B/3B
6.
Memories
This section describes the different memories in the AT90PWM2/2B/3/3B. The AVR architecture
has two main memory spaces, the Data Memory and the Program Memory space. In addition,
the AT90PWM2/2B/3/3B features an EEPROM Memory for data storage. All three memory
spaces are linear and regular.
6.1
In-System Reprogrammable Flash Program Memory
The AT90PWM2/2B/3/3B contains 8K bytes On-chip In-System Reprogrammable Flash memory
for program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is organized as
4K x 16. For software security, the Flash Program memory space is divided into two sections,
Boot Program section and Application Program section.
Th e Fla s h m e m o ry h a s a n e n d u r a n c e o f a t l e a s t 1 0 , 0 0 0 w ri t e / e ra s e c y c l e s . T h e
AT90PWM2/2B/3/3B Program Counter (PC) is 12 bits wide, thus addressing the 4K program
memory locations. The operation of Boot Program section and associated Boot Lock bits for
software protection are described in detail in
“Boot Loader Support – Read-While-Write Self-Pro-
.
“Memory Programming” on page 279
contains a detailed description
on Flash programming in SPI or Parallel programming mode.
Constant tables can be allocated within the entire program memory address space (see the LPM
– Load Program Memory.
Timing diagrams for instruction fetch and execution are presented in
Figure 1. Program Memory Map
6.2
SRAM Data Memory
shows how the AT90PWM2/2B/3/3B SRAM Memory is organized.
0x0000
0x0FFF
Program Memory
Application Flash Section
Boot Flash Section
