129
ATmega103(L)
0945G–09/01
Note:
For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses
should never be written. Some of the status flags are cleared by writing a logical “1” to them. Note that the CBI and SBI instruc-
tions will operate on all bits in the I/O register, writing a one back into any flag read as set, thus clearing the flag. The CBI and
SBI instructions work with registers $00 to $1F only.
Register Summary
Address
Name
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Page
$3F ($5F)
SREG
I
T
H
S
V
N
Z
C
$3E ($5E)
SPH
SP15
SP14
SP13
SP12
SP11
SP10
SP9
SP8
$3D ($5D)
SPL
SP7
SP6
SP5
SP4
SP3
SP2
SP1
SP0
$3C ($5C)
XDIV
XDIVEN
XDIV6
XDIV5
XDIV4
XDIV3
XDIV2
XDIV1
XDIV0
$3B ($5B)
RAMPZ
–
–
–
–
–
–
–
RAMPZ0
$3A ($5A)
EICR
ISC71
ISC70
ISC61
ISC60
ISC51
ISC50
ISC41
ISC40
$39 ($59)
EIMSK
INT7
INT6
INT5
INT4
INT3
INT2
INT1
INT0
$38 ($58)
EIFR
INTF7
INTF6
INTF5
INTF4
–
–
–
–
$37 ($57)
TIMSK
OCIE2
TOIE2
TICIE1
OCIE1A
OCIE1B
TOIE1
OCIE0
TOIE0
$36 ($56)
TIFR
OCF2
TOV2
ICF1
OCF1A
OCF1B
TOV1
OCF0
TOV0
$35 ($55)
MCUCR
SRE
SRW
SE
SM1
SM0
–
–
–
$34 ($54)
MCUSR
–
–
–
–
–
–
EXTRF
PORF
$33 ($53)
TCCR0
–
PWM0
COM01
COM00
CTC0
CS02
CS01
CS00
$32 ($52)
TCNT0
Timer/Counter0 (8-bit)
$31 ($51)
OCR0
Timer/Counter0 Output Compare Register
$30 ($50)
ASSR
–
–
–
–
AS0
TCN0UB
OCR0UB
TCR0UB
$2F ($4F)
TCCR1A
COM1A1
COM1A0
COM1B1
COM1B0
–
–
PWM11
PWM10
$2E ($4E)
TCCR1B
ICNC1
ICES1
–
–
CTC1
CS12
CS11
CS10
$2D ($4D)
TCNT1H
Timer/Counter1 – Counter Register High Byte
$2C ($4C)
TCNT1L
Timer/Counter1 – Counter Register Low Byte
$2B ($4B)
OCR1AH
Timer/Counter1 – Output Compare Register A High Byte
$2A ($4A)
OCR1AL
Timer/Counter1 – Output Compare Register A Low Byte
$29 ($49)
OCR1BH
Timer/Counter1 – Output Compare Register B High Byte
$28 ($48)
OCR1BL
Timer/Counter1 – Output Compare Register B Low Byte
$27 ($47)
ICR1H
Timer/Counter1 – Input Capture Register High Byte
$26 ($46)
ICR1L
Timer/Counter1 – Input Capture Register Low Byte
$25 ($45)
TCCR2
–
PWM2
COM21
COM20
CTC2
CS22
CS21
CS20
$24 ($44)
TCNT2
Timer/Counter2 (8-bit)
$23 ($43)
OCR2
Timer/Counter2 Output Compare Register
$21 ($47)
WDTCR
–
–
–
WDTOE
WDE
WDP2
WDP1
WDP0
$1F ($3F)
EEARH
–
–
–
–
EEAR11
EEAR10
EEAR9
EEAR8
$1E ($3E)
EEARL
EEPROM Address Register L
$1D ($3D)
EEDR
EEPROM Data Register
$1C ($3C)
EECR
–
–
–
–
EERIE
EEMWE
EEWE
EERE
$1B ($3B)
PORTA
PORTA7
PORTA6
PORTA5
PORTA4
PORTA3
PORTA2
PORTA1
PORTA0
$1A ($3A)
DDRA
DDA7
DDA6
DDA5
DDA4
DDA3
DDA2
DDA1
DDA0
$19 ($39)
PINA
PINA7
PINA6
PINA5
PINA4
PINA3
PINA2
PINA1
PINA0
$18 ($38)
PORTB
PORTB7
PORTB6
PORTB5
PORTB4
PORTB3
PORTB2
PORTB1
PORTB0
$17 ($37)
DDRB
DDB7
DDB6
DDB5
DDB4
DDB3
DDB2
DDB1
DDB0
$16 ($36)
PINB
PINB7
PINB6
PINB5
PINB4
PINB3
PINB2
PINB1
PINB0
$15 ($35)
PORTC
PORTC7
PORTC6
PORTC5
PORTC4
PORTC3
PORTC2
PORTC1
PORTC0
$12 ($32)
PORTD
PORTD7
PORTD6
PORTD5
PORTD4
PORTD3
PORTD2
PORTD1
PORTD0
$11 ($31)
DDRD
DDD7
DDD6
DDD5
DDD4
DDD3
DDD2
DDD1
DDD0
$10 ($30)
PIND
PIND7
PIND6
PIND5
PIND4
PIND3
PIND2
PIND1
PIND0
$0F ($2F)
SPDR
SPI Data Register
$0E ($2E)
SPSR
SPIF
WCOL
–
–
–
–
–
–
$0D ($2D)
SPCR
SPIE
SPE
DORD
MSTR
CPOL
CPHA
SPR1
SPR0
$0C ($2C)
UDR
UART I/O Data Register
$0B ($2B)
USR
RXC
TXC
UDRE
FE
OR
–
–
–
$0A ($2A)
UCR
RXCIE
TXCIE
UDRIE
RXEN
TXEN
CHR9
RXB8
TXB8
$09 ($29)
UBRR
UART Baud Rate Register
$08 ($28)
ACSR
ACD
–
ACO
ACI
ACIE
ACIC
ACIS1
ACIS0
$07 ($27)
ADMUX
–
–
–
–
–
MUX2
MUX1
MUX0
$06 ($26)
ADCSR
ADEN
ADSC
–
ADIF
ADIE
ADPS2
ADPS1
ADPS0
$05 ($25)
ADCH
–
–
–
–
–
–
ADC9
ADC8
$04 ($24)
ADCL
ADC7
ADC6
ADC5
ADC4
ADC3
ADC2
ADC1
ADC0
$03 ($23)
PORTE
PORTE7
PORTE6
PORTE5
PORTE4
PORTE3
PORTE2
PORTE1
PORTE0
$02 ($22)
DDRE
DDE7
DDE6
DDE5
DDE4
DDE3
DDE2
DDE1
DDE0
$01 ($21)
PINE
PINE7
PINE6
PINE5
PINE4
PINE3
PINE2
PINE1
PINE0
$00 ($20)
PINF
PINF7
PINF6
PINF5
PINF4
PINF3
PINF2
PINF1
PINF0