Functional description
Each MISP can support 4 line cards (UILC or SILC or any combination of the two). Each line
card supports 8 DSLs, therefore each MISP supports 32 DSLs. As each DSL uses two B-
channels and one D-channel the MISP supports 64 B-channels and 32 D-channels. If the MISP
is carrying packet data, it must dedicate one of its D-channels to communicate with the external
packet handler. In this case the MISP supports only 31 DSLs.
The main functions of the MISP are:
• communicate with the Call Server CPU to report ISDN BRI status and receive downloaded
application software and configuration parameters
• manage Layer 2 and Layer 3 signaling that controls call connection and terminal
identification
• control terminal initialization and addressing
• assign B-channels for switched voice and data transmission by communicating with the
BRI terminal over the D-channel and allocating to it an idle B-channel with appropriate
bearer capabilities
• separate D-channel data from signaling information and route the data to the packet
handler
• send call control messages to ISDN BRI terminals over the D-channel
Micro Processing Unit (MPU)
The MPU coordinates and controls data transfer and addressing of the peripheral devices and
communicates with the CPU using a message channel on the CPU bus. The tasks that the
MPU performs depend on the interrupts it receives. The interrupts are prioritized by the
importance of the tasks they control.
High-Level Data Link Controller (HDLC)
The HDLC is a format converter that supports up to 32 serial channels that communicate at
speeds up to 64 kbps. The HDLC converts messages into the following two message formats:
• a serially transmitted, zero-inserted, CRC protected message that has a starting and an
ending flag
• a data structure
NTBK22 MISP card
548 Circuit Card Reference
July 2011
Summary of Contents for 1000 Series
Page 1: ...Circuit Card Reference Nortel Communication Server 1000 7 0 NN43001 311 04 04 July 2011 ...
Page 20: ...20 Circuit Card Reference July 2011 ...
Page 30: ...Introduction 30 Circuit Card Reference July 2011 Comments infodev avaya com ...
Page 116: ...Option settings 116 Circuit Card Reference July 2011 Comments infodev avaya com ...
Page 143: ...Figure 25 CP PIV card front Physical description Circuit Card Reference July 2011 143 ...
Page 148: ...NT4N39AA CP Pentium IV Card 148 Circuit Card Reference July 2011 Comments infodev avaya com ...
Page 287: ...Figure 86 Clock Controller Option 3 Operation Circuit Card Reference July 2011 287 ...
Page 302: ...NT5K21 XMFC MFE card 302 Circuit Card Reference July 2011 Comments infodev avaya com ...
Page 346: ...NT6D80 MSDL card 346 Circuit Card Reference July 2011 Comments infodev avaya com ...
Page 353: ...Figure 96 NTDK16 DLC Functional description Circuit Card Reference July 2011 353 ...
Page 461: ...Figure 147 Paging trunk operation Applications Circuit Card Reference July 2011 461 ...
Page 462: ...NT8D15 E and M Trunk card 462 Circuit Card Reference July 2011 Comments infodev avaya com ...
Page 500: ...NTAK09 1 5 Mb DTI PRI card 500 Circuit Card Reference July 2011 Comments infodev avaya com ...
Page 512: ...NTAK10 2 0 Mb DTI card 512 Circuit Card Reference July 2011 Comments infodev avaya com ...
Page 534: ...NTAK79 2 0 Mb PRI card 534 Circuit Card Reference July 2011 Comments infodev avaya com ...
Page 550: ...NTBK22 MISP card 550 Circuit Card Reference July 2011 Comments infodev avaya com ...
Page 560: ...NTBK50 2 0 Mb PRI card 560 Circuit Card Reference July 2011 Comments infodev avaya com ...
Page 595: ...Figure 165 MGC block diagram Introduction Circuit Card Reference July 2011 595 ...
Page 662: ...NTRB21 DTI PRI DCH TMDI card 662 Circuit Card Reference July 2011 Comments infodev avaya com ...
Page 668: ...NTVQ01xx Media Card 668 Circuit Card Reference July 2011 Comments infodev avaya com ...
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