X20 system modules • Digital output modules • X20DO6325
1220
X20 system User's Manual 3.10
4.15.19.11.6 "OSP" function model
In the "OSP" function model (Operator Set Predefined), the user defines an analog value or digital pattern. This
OSP value is output as soon as communication between the module and master is interrupted.
Functionality
The user can choose between two OSP modes:
•
Retain last valid value
•
Replace with static value
In the first case, the module retains the last value as validly recognized output state.
When selecting the mode, "Replace with static value" a plausible output value must be entered in the corresponding
value register. If an OSP event occurs, this value will be output instead of the value currently requested by the task.
4.15.19.11.6.1 Activating the OSP output in the module
Name:
OSPValid
This data point offers the possibility to start module output and request OSP operation during running operation.
Data type
Value
USINT
See bit structure.
Bit structure:
Bit
Name
Value
Information
0
Request OSP operation (after initial start or module in Standby)
0
OSPValid
1
Request normal operation
1 - 7
0
Reserved
There is one OSPValid bit on the module, which is managed by the user task. It must be set when the enabled
channels are started. As long as the OSPValid bit remains set in the module, the module behaves the same as
the "Standard" function model.
If an OSP event occurs (e.g. communication between the module and master CPU interrupted) then the OSPValid
bit will be reset on the module. The module enters OSP mode and the output occurs in the "OSPMode" register
according to the configuration.
The following applies:
The OSP replacement value remains even after the communication channel has recovered. OSP mode
is only exited when a set OSPValid bit is transferred.
When the master CPU is restarted, the OSPValid bit is re-initialized on the master CPU. It must once
more be set by the application and transferred via the bus.
When temporary communication errors occur between the module and master CPU (e.g. due to EMC),
a few bus cycles will pass without refreshing the cyclic registers. The OSPValid bit is reset internally in
the module - the bit in the CPU however remains set. Upon the next successful transfer, the OSPValid
bit in the module is set again and the module returns to normal operation.
The ModulOK bit can be evaluated if the task in the master CPU needs to know which output mode the module
is currently in.
Warning!
If the OSPValid bit is reset to "0" on the module, then the output state no longer depends on the
responsible task in the master CPU. However, output still occurs according to the configuration of the
OSP replacement value.
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