X20 system modules • Analog input modules • X20AP31x1
X20 system User's Manual 3.10
363
Communication status of the module
Name:
InputSequence
The "InputSequence" register contains information about the communication status of the module. It is written by
the module and should only be read by the CPU.
Data type
Value
USINT
See bit structure.
Bit structure:
Bit
Name
Value
Information
0 - 2
InputSequenceCounter
0 - 7
Counter for sequences issued in the input direction
0
Not ready (disabled)
3
InputSyncBit
1
Ready (enabled)
4 - 6
OutputSequenceAck
0 - 7
Mirrors the InputSequenceCounter value
0
Not ready (disabled)
7
OutputSyncAck
1
Ready (enabled)
InputSequenceCounter
The InputSequenceCounter is a continuous counter of sequences that have been issued by the module. The
module uses the InputSequenceCounter to direct the CPU to accept a sequence (the input direction must be
synchronized when this happens).
InputSyncBit
The module uses the InputSyncBit to attempt to synchronize the input channel.
OutputSequenceAck
OutputSequenceAck is used for acknowledgment. The value of the OutputSequenceCounter is mirrored if the
module has received a sequence successfully.
OutputSyncAck
The OutputSyncAck bit acknowledges the synchronization of the output channel for the CPU. This indicates that
the module is ready to receive data.
Summary of Contents for X20 System
Page 2: ......
