X20 system modules • Counter modules • X20DC2395
X20 system User's Manual 3.10
815
I/O configuration - ABR encoder
The following table shows how the module's various event functions can be linked in order to configure an ABR
encoder.
Register
Value
Comment
For the function
(any)
Desired offset value for referencing
0x0201
Link between the first counter event and the "direct input" comparator condition
TRUE
0x01
Mode = AB encoder
0x0D
Configure the calculation of the internal "counter1" and "counter2" registers
(see 4.11.14.12.6.1 "Counter value calculation" and "Examples of calculation
0x1002 or 0x1012
Selection of the desired input edge as trigger for the ABR encoder function
0x0000
Configuration of the first counter event (for referencing)
0x03
Mode of the "direct input function" - Continuous
0x00 or 0x08
Comparator status for the "direct input function"
0x08
Comparator mask for the "direct input function"
For the latch
0x000D
Configuration of the calculation of the value used for the latch
0x03
Mode of the first counter event function - Continuous
(any)
Number of the event that should trigger the latch
For the comparator
0x00D0
Event number of Timer 1 (50 μs)
Information:
The latch and comparator must not have the same event number!
0x900D or 0xA00D
Configuration of the comparator for the second counter event
0x03
Mode of the second counter event function - Continuous
0x0861
TRUE event output of the second counter to trigger the direct output function
(set outputs).
0x08, 0x20, 0x80
Outputs that should be set when comparator condition = TRUE
0x0860
FALSE event output of the second counter to trigger the direct output function
(reset outputs).
0x08, 0x20, 0x80
Outputs that should be reset when comparator condition = FALSE
I/O configuration - Up/down counter
The following table shows how the module's various event functions can be linked in order to configure an up/
down counter.
[x] stands for the respective counter function, either 1 or 2
Register
Value
Comment
For the function
0x03
Counter mode = Up/down counter
0x0D, 0x07
Configure the calculation of the internal "counter1" and "counter2" registers
(see 4.11.14.12.6.1 "Counter value calculation" and "Examples of calculation
For the latch
0x0D, 0x07
Configuration of the calculation of the first value used for the latch
0x03
Mode of the first counter function - Continuous
(any)
Number of the event that should trigger Latch 1
0x0D, 0x07
Configuration of the calculation of the second value used for the latch
0x03
Mode of the second counter function - Continuous
(any)
Number of the event that should trigger Latch 2
For the comparator
0x00D0
Event number of Timer 1 (50 μs)
Information:
The latch and comparator must not have the same event number!
0x900D, 0xA00D or 0x9007, 0xA007
Configuration of the comparator for the second counter event
0x03
Mode of the second counter event function - Continuous
0x0861
TRUE event output of the second counter to trigger the direct output function
(set outputs).
0x08, 0x20, 0x80
Outputs that should be set when comparator condition = TRUE
0x0860
FALSE event output of the second counter to trigger the direct output function
(reset outputs).
0x08, 0x20, 0x80
Outputs that should be reset when comparator condition = FALSE
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