Software • BIOS options
190
Power Panel 500 user's manual V1.40
1.5.10 PCI Express root port 2
Warning!
Improper settings can cause instability or device problems. It is therefore strongly recommended that
these settings only be changed by experienced users.
InsydeH2O Setup Utility Rev. *
Advanced
Control the PCI Express
Root Port.
PCI Express Root Port 2 <Enabled>
Interrupt Pin 1 <Auto>
VC1 Enable <Disabled>
ASPM <Disabled>
URR <Disabled>
FER <Disabled>
NFER <Disabled>
CER <Disabled>
CT0 <Disabled>
SEFE <Disabled>
SENFE <Disabled>
SECE <Disabled>
PME Interrupt <Disabled>
PME SCI <Disabled>
Hot Plug SCI <Disabled>
F1
F9
Esc
Enter
F10
Help Select Item
Change Values Setup Defaults
Exit Select Menu
Select SubMenu
Save and Exit
F5/F6
Figure 116: US15W Advanced - PCI Express Root Port 2
BIOS setting
Function
Configuration options
Effect
Enabled
Enables PCI Express root port 2
PCI Express root port 2
Option for enabling/disabling PCI Express root
port 2
Disabled
Disables PCI Express root port 2
Auto
Enables IRQ for root port 2
Interrupt pin 1
Information:
This function is disabled by default
when using ARwin and/or a fieldbus
card. This function must be disabled in
order to use a fieldbus card.
Disabled
Disables IRQ for root port 2
Auto
Configures the mapping under the "VC1/TC
mapping" setting in BIOS
VC1 enable
Virtual channel 1
Disabled
Disables this function
Automatically uses the TC0 traffic class and
maps it to the VC0 virtual channel
TC0
TBD
TC1
Maps the TC1 traffic class manually to the VC1
virtual channel
TC2
Maps the TC2 traffic class manually to the VC1
virtual channel
TC3
Maps the TC3 traffic class manually to the VC1
virtual channel
TC4
Maps the TC4 traffic class manually to the VC1
virtual channel
TC5
Maps the TC5 traffic class manually to the VC1
virtual channel
TC6
Maps the TC6 traffic class manually to the VC1
virtual channel
VC1/TC mapping
1)
Option for defining which traffic will be mapped to
which virtual channel
TC7
Maps the TC7 traffic class manually to the VC1
virtual channel
Enabled
Enables this function
ASPM
Active state power management
Option for configuring a power saving function
(L0s/L1) for PCIe link cards if they do not require
full power
Disabled
Disables this function
Table 132: US15W Advanced - PCI Express root port 2 - Configuration options
