BE1-BPR
4
FUNCTIONAL DESCRIPTION
Figure 2 - Example of programmable logic (BFL2E)
BFL2E logic in figure 2 provides the following application features:
1.
Three-Pole Tripping BF Logic
(Output latch-in provided and Control timer limits operational window). Three
BFI inputs are available at IN3, IN4, and IN5 to start delay timer T1. If the BFI inputs are not reset by the time
T1 times out and either the phase (F1) or neutral (F2) fault detector is still picked up, then outputs BFO1 and
BFO2 will close to trip the backup breakers. Control timer (T3) is used to limit the breaker failure window of
opportunity.
2.
Single-Pole Tripping BF Logic
(Features: Output latch-in provided and Control timer limits operational
window). If single-pole tripping is used, a BFI input is available (IN6) to start delay timer T2. This input is only
supervised by the phase fault detector (F1). If the BFI input (IN6) is not reset by the time the timer T2 times
out and the phase fault detector (F1) is picked up, outputs BFO1 and BFO2 close, tripping the backup
breakers. Control timer T3 is used to limit the breaker failure window of opportunity. Neutral fault detector (F2)
is not used to supervise the single-pole BF logic, because F2 is still picked up by the phase imbalance after the
fault clears. Three-phase BF logic is inhibited during this period, because there is no 3-phase BFI input active.