FLI2300 Digital Video Converter Data Sheet
*** Genesis Microchip Confidential ***
PRELIMINARY INFORMATION -- SUBJECT TO CHANGE
3 PIN
INFORMATION
3.1 Pin
Diagram
Figure 3.1: Pinout Information
1 5 5
1 5 0
1 4 5
1 4 0
1 3 5
1 3 0
1 2 5
1 2 0
1 1 5
1 1 0
1 0 5
1
5
1 0
1 5
2 0
2 5
3 0
3 5
4 0
4 5
5 0
5 5
6 5
6 0
1 0 0
9 5
9 0
8 5
8 0
7 5
7 0
2 0 5
1 9 5
2 0 0
1 6 0
1 6 5
1 7 0
1 7 5
1 8 0
1 8 5
1 9 0
HSYNC1_PORT1
VDD1
B/Cb/D1_0
VSS
IN_CLK1_PORT1
FIELD ID1_PORT1
VSYNC1_PORT1
HSYNC2_PORT1
IN_CLK2_PORT1
FIELD ID2_PORT1
VSYNC2_PORT1
B/Cb/D1_6
B/Cb/D1_5
B/Cb/D1_4
B/Cb/D1_3
B/Cb/D1_2
B/Cb/D1_1
B/Cb/D1_7
VDDcore1
VSScore
R/Cr/Cb Cr_0
R/Cr/Cb Cr_6
R/Cr/Cb Cr_5
R/Cr/Cb Cr_4
R/Cr/Cb Cr_3
R/Cr/Cb Cr_2
R/Cr/Cb Cr_1
R/Cr/Cb Cr_7
VDD2
VSS
G/Y/Y_0
G/Y/Y_1
G/Y/Y_6
G/Y/Y_5
G/Y/Y_4
G/Y/Y_3
G/Y/Y_2
G/Y/Y_7
VDDcore2
VSScore
IN_SEL
TEST
DEV_ADDR1
DEV_ADDR0
SCLK
SDATA
RESET_N
VDD3
VSS
SDRAM DATA(0)
SDRAM DATA(2)
SDRAM DATA(1)
SDRAM
DATA(3
)
SDRAM
DATA(1
0
)
SDRAM
DATA(9
)
SDRAM
DATA(8
)
SDRAM
DATA(7
)
SDRAM
DATA(6
)
SDRAM
DATA(5
)
SDRAM
DATA(4
)
SDRAM
DATA(1
7
)
SDRAM
DATA(1
6
)
SDRAM
DATA(1
5
)
SDRAM
DATA(1
4
)
SDRAM
DATA(1
2
)
SDRAM
DATA(1
3
)
SDRAM
DATA(1
1
)
VDD4
VSS
VD
D
core3
VSSc
ore
SDRAM
DATA(2
0
)
SDRAM
DATA(1
9
)
SDRAM
DATA(1
8
)
SDRAM
DATA(3
1
)
SDRAM
DATA(3
0
)
SDRAM
DATA(2
9
)
SDRAM
DATA(2
8
)
SDRAM
DATA(2
6
)
SDRAM
DATA(2
7
)
SDRAM
DATA(2
5
)
SDRAM
DATA(2
4
)
SDRAM
DATA(2
3
)
SDRAM
DATA(2
1
)
SDRAM
DATA(2
2
)
VD
D
core4
VSSc
ore
VSS
VDD5
TEST IN
SDRAM
ADDR(1
0
)
SDRAM
ADDR(5
)
SDRAM
ADDR(4
)
SDRAM
ADDR(3
)
SDRAM
ADDR(6
)
SDRAM
ADDR(7
)
SDRAM
ADDR(8
)
SDRAM
ADDR(9
)
VD
D
core5
VSSc
ore
SDRAM
ADDR(0
)
SDRAM
ADDR(1
)
SDRAM
ADDR(2
)
SDRAM
WEN
B/U/Pb_OUT_7
VDDcore7
VSScore
R/V/Pr_OUT_7
VDD8
VSS
G/Y/Y_OUT_7
G/Y/Y_OUT_1
G/Y/Y_OUT_2
G/Y/Y_OUT_3
G/Y/Y_OUT_4
G/Y/Y_OUT_5
G/Y/Y_OUT_6
G/Y/Y_OUT_0
R/V/Pr_OUT_0
R/V/Pr_OUT_1
R/V/Pr_OUT_2
R/V/Pr_OUT_3
R/V/Pr_OUT_4
R/V/Pr_OUT_5
R/V/Pr_OUT_6
B/U/Pb_OUT_0
B/U/Pb_OUT_1
B/U/Pb_OUT_2
B/U/Pb_OUT_3
B/U/Pb_OUT_4
B/U/Pb_OUT_5
B/U/Pb_OUT_6
VSS
VDD7
CLKOUT
VSScore
VDDcore6
TEST OUT1
CTLOUT4
CTLOUT0
CTLOUT1
CTLOUT2
CTLOUT3
TEST OUT0
TEST3
SDRAM CLKIN
SDRAM CLKOUT
VSS
VDD6
SDRAM DQM
SDRAM CASN
SDRAM BA1
SDRAM BA0
SDRAM CSN
SDRAM RASN
OE
PLL_PVDD
PLL_PVSS
AVSS_PLL_BE1
AVDD_PLL_BE1
AVSS_PLL_SDI
AVSS_PLL_FE
AVSS_PLL_BE2
AVD
D
_
PLL_FE
AVD
D
_
PLL_SD
I
AVDD_PLL_BE2
DAC_PVSS
DAC_
VDD
DAC_
VSS
DAC_
B_
OUT
DAC_
G_
OUT
DAC_
R_
OUT
DAC_
AVDDB
DAC_
AVDDR
DAC_
AVDDG
DAC_AVSSB
DAC_AVSSR
DAC_AVSSG
DAC_
COM
P
DAC_
RSET
DAC_
VREFOUT
DAC_
VREFIN
DAC_
AVDD
DAC_AVSS
DAC_GR_AVSS
DAC_
GR_
AVDD
DAC_
PVDD
TEST0
TEST1
TEST2
XTAL IN
XTAL OUT
VDD9
VSS
HSYNC_
PORT2
IN
_C
LK_PO
R
T2
FIELD ID_PO
R
T2
VSYNC_PORT2
VSSc
ore
VD
D
core8
D
1_IN
_0
D
1_IN
_7
D
1_IN
_6
D
1_IN
_5
D
1_IN
_4
D
1_IN
_3
D
1_IN
_2
D
1_IN
_1
Package: 208-pin PQFP
Summary of Contents for DV985S
Page 1: ...SERVICE MANUAL DV985S...
Page 6: ...5 1 Optical pickup Unit Explosed View and Part List Pic 1...
Page 12: ......
Page 47: ......
Page 49: ......
Page 51: ......
Page 53: ......
Page 55: ......
Page 61: ......
