12
3
1
23
4
5
6
A
B
C
D
E
A
B
C
D
E
F
B/U
_O
U
T2
G/
Y
_OU
T2
B/U
_O
U
T6
G/
Y
_OU
T6
G/
Y
_OU
T1
B/U
_O
U
T1
G/
Y
_OU
T3
B/U
_O
U
T0
B/U
_O
U
T7
B/U
_O
U
T5
G/
Y
_OU
T4
B/U
_O
U
T4
D1DATA
3
G/
Y
_OU
T5
G/
Y
_OU
T0
G/
Y
_OU
T7
B/U
_O
U
T3
RASN
WEN
SDRAM_CLK
BA0
CASN
CSN
DQM
BA1
R/V
_O
U
T2
R/V
_O
U
T6
R/V
_O
U
T1
R/V
_O
U
T0
R/V
_O
U
T5
R/V
_O
U
T4
R/V
_O
U
T7
R/V
_O
U
T3
DA
TA
[0
..31]
DATA
4
DATA
7
DATA
21
DATA
10
DATA
23
DATA
24
DATA
13
DA
TA
2
DATA
14
DATA
28
DATA
11
DATA
12
DATA
8
DATA
9
DATA
30
DATA
6
DATA
17
DATA
3
DATA
22
DATA
16
DATA
31
DATA
26
DATA
29
DATA
27
DATA
20
DATA
15
DATA
19
DATA
18
DA
TA
1
DATA
25
DATA
5
ADDR2
ADDR8
ADDR1
ADDR3
A
DDR[0..10]
ADDR7
ADDR4
ADDR5
ADDR0
ADDR10
ADDR6
ADDR9
DA
TA
0
D1DATA
7
D1DATA
6
D1DATA
5
D1DATA
4
D1DATA
2
D1DATA
1
D1DATA
0
R
217
10K
R
208
0R
R
207
0R
R
206
0R
R
218
10K
R
219
10K
R
221
100R
1
2
3
4
8
7
6
5
R
P
207
22R
X
4
R
220
100R
1
2
3
4
8
7
6
5
R
P
208
22R
X
4
T
C
202
22u
F
/16V
1
2
3
4
8
7
6
5
R
P
206
22R
X
4
R
224
22R
1
2
3
4
8
7
6
5
R
P
205
22R
X
4
R
205
100
R
210
0R
R
212
187
1
2
3
4
8
7
6
5
R
P
202
22R
x
4
1
2
3
4
8
7
6
5
R
P
201
22R
x
4
1
2
3
4
8
7
6
5
R
P
203
22R
X
4
T
C
201
10u
F
/16V
1
2
3
4
8
7
6
5
R
P
204
22R
X
4
R
214
4.7K
R
213
0R
R
223
22R
FLI2300
HS
YNC1
_
P
ORT
1
1
VS
YNC1
_
P
ORT
1
2
FI
E
L
D I
D1
_
P
ORT
1
3
IN
_C
L
K
1_P
O
R
T
1
4
HS
YNC2
_
P
ORT
1
5
VS
YNC2
_
P
ORT
1
6
FI
E
L
D I
D2
_
P
ORT
1
7
VDD1
(3
.3
)
8
V
SSi
o
1
9
IN
_C
L
K
2_P
O
R
T
1
10
B/
Cb/
D
1
_
0
11
B/
Cb/
D
1
_
1
12
B/
Cb/
D
1
_
2
13
B/
Cb/
D
1
_
3
14
B/
Cb/
D
1
_
4
15
VDDc
o
re
1
(1
.8
)
16
V
SSc
o
re
17
B/
Cb/
D
1
_
5
18
B/
Cb/
D
1
_
6
19
B/
Cb/
D
1
_
7
20
R/
Cr
/CbCr
_
0
21
R/
Cr
/CbCr
_
1
22
R/
Cr
/CbCr
_
2
23
R/
Cr
/CbCr
_
3
24
R/
Cr
/CbCr
_
4
25
R/
Cr
/CbCr
_
5
26
R/
Cr
/CbCr
_
6
27
R/
Cr
/CbCr
_
7
28
G
/Y/
Y_
0
29
VDD2
(3
.3
)
30
V
SSi
o
2
31
G
/Y/
Y_
1
32
G
/Y/
Y_
2
33
G
/Y/
Y_
3
34
G
/Y/
Y_
4
35
VDDc
o
re
2
(1
.8
)
36
V
SSc
o
re
37
G
/Y/
Y_
5
38
G
/Y/
Y_
6
39
G
/Y/
Y_
7
40
IN
_SE
L
41
TEST
42
DE
V_
A
DDR1
43
DE
V_
A
DDR0
44
SC
L
K
45
SD
A
T
A
46
R
E
SET_
N
47
VDD3
(3
.3
)
48
V
SSi
o
3
49
SD
R
A
M
D
0
50
SD
R
A
M
D
1
51
SD
R
A
M
D
2
52
SDRA
M D3
53
SDRA
M D4
54
SDRA
M D5
55
SDRA
M D6
56
SDRA
M D7
57
SDRA
M D8
58
SDRA
M D9
59
SDRA
M D1
0
60
SDRA
M D1
1
61
VDD4(3.3)
62
VSSio
4
63
SDRA
M D1
2
64
SDRA
M D1
3
65
SDRA
M D1
4
66
SDRA
M D1
5
67
VDDcore
3(1.8)
68
VSSco
re
69
SDRA
M D1
6
70
SDRA
M D1
7
71
SDRA
M D1
8
72
SDRA
M D1
9
73
SDRA
M D2
0
74
SDRA
M D2
1
75
SDRA
M D2
2
76
SDRA
M D2
3
77
SDRA
M D2
4
78
SDRA
M D2
5
79
VDDcore
4(1.8)
80
VSSco
re
81
SDRA
M D2
6
82
SDRA
M D2
7
83
SDRA
M D2
8
84
SDRA
M D2
9
85
SDRA
M D3
0
86
SDRA
M D3
1
87
VDD5(3.3)
88
VSSio
5
89
TEST IN
90
SDRA
M ADDR10
91
SDRAM ADDR
9
92
SDRAM ADDR
8
93
SDRAM ADDR
7
94
SDRAM ADDR
6
95
VDDcore
5(1.8)
96
VSSco
re
97
SDRAM ADDR
5
98
SDRAM ADDR
4
99
SDRAM ADDR
3
100
SDRAM ADDR
2
101
SDRAM ADDR
1
102
SDRAM ADDR
0
103
SDRA
M WEN
104
OE
156
G
/Y/
Y_
OUT
_
7
155
G
/Y/
Y_
OUT
_
6
154
G
/Y/
Y_
OUT
_
5
153
G
/Y/
Y_
OUT
_
4
152
G
/Y/
Y_
OUT
_
3
151
G
/Y/
Y_
OUT
_
2
150
G
/Y/
Y_
OUT
_
1
149
G
/Y/
Y_
OUT
_
0
148
V
SSi
o
147
VDD8
(3
.3
)
146
R/
Y/
P
r_
OUT
_
7
145
R/
Y/
P
r_
OUT
_
6
144
R/
Y/
P
r_
OUT
_
5
143
R/
Y/
P
r_
OUT
_
4
142
R/
Y/
P
r_
OUT
_
3
141
R/
Y/
P
r_
OUT
_
2
140
V
SSc
o
re
139
VDDc
o
re
7
(1
.8
)
138
R/
Y/
P
r_
OUT
_
1
137
R/
Y/
P
r_
OUT
_
0
136
B/
U/
P
b
_
OUT
_
7
135
B/
U/
P
b
_
OUT
_
6
134
B/
U/
P
b
_
OUT
_
5
133
B/
U/
P
b
_
OUT
_
4
132
B/
U/
P
b
_
OUT
_
3
131
B/
U/
P
b
_
OUT
_
2
130
V
SSi
o
7
129
VDD7
(3
.3
)
128
B/
U/
P
b
_
OUT
_
1
127
B/
U/
P
b
_
OUT
_
0
126
CL
K
OUT
125
V
SSc
o
re
124
VDDc
o
re
6
(1
.8
)
123
CT
L
OUT
4
122
CT
L
OUT
3
121
CT
L
OUT
2
120
CT
L
OUT
1
119
CT
L
OUT
0
118
TEST O
U
T
1
117
TEST O
U
T
0
116
TEST3
115
S
D
RA
M CL
K
IN
114
V
SSi
o
6
113
VDD6
(3
.3
)
112
S
D
RA
M CL
K
OUT
111
S
D
RA
M DQM
110
S
D
RA
M CS
N
109
S
D
RA
M BA
0
108
S
D
RA
M BA
1
107
S
D
RA
M CA
S
N
106
S
D
RA
M RA
S
N
105
HS_PORT
2
208
VS_PORT
2
207
FID_POR
T2
206
D1_IN_7
205
D1_IN_6
204
D1_IN_5
203
D1_IN_4
202
D1_IN_3
201
D1_IN_2
200
D1_IN_1
199
VSSco
re
198
VDDcore
8(1.8)
197
D1_IN_0
196
IN_CL
K_P
ORT
2
195
VSSio
10
194
VDD9(3.3)
193
XTAL
OUT
192
XTAL
IN
191
TEST2
190
TEST1
189
TEST0
188
DAC_PVDD(3.3)
187
DAC_GR
_AVDD(3.3)
186
DAC_GR
_AVSS
185
DAC_AVSS
184
DAC_AVDD(3.3)
183
DAC_VR
EFIN
182
DAC_VR
EFOUT
181
DAC_R
SET
180
DAC_C
OMP
179
DAC_AVSSR
178
DAC_AVDDR
(3.3)
177
DAC_R
OUT
176
DAC_AVSSG
175
DAC_AVDDG(3.3)
174
DAC_GOUT
173
DAC_AVSSB
172
DAC_AVDDB
(3.3)
171
DAC_B
OUT
170
DAC_VSS
169
DAC_VDD(1.8)
168
DAC_PVSS
167
AVSS_PLL_
FE
166
AVDD_PLL
_FE
(1.8)
165
AVDD_PLL
_SDI(1.8)
164
AVSS_PLL_
SDI
163
AVSS_PLL_
BE
2
162
AVDD_PLL
_B
E2(1.8)
161
AVDD_PLL
_B
E1(1.8)
160
AVSS_PLL_
BE
1
159
PLL_PVSS
158
PLL
_PVDD(1.8)
157
U
201
C
201
33p
F
R
222
22R
C
202
33p
F
X
201
13.5M
H
z
1
T
P
204
R
216
100R
R
225
22R
1
T
P
205
R
211
47K
R
209
0R
V
dd IO
3.3V
G
ND_
FI
E
L
D S
IG
N
A
L
V
dd c
o
re
1.8
D
A
C
3.3V
GN
D
GN
D
VDD I
O 3
.3
V
G
ND_
E
A
RT
H
P
LL1
.8
V
OPTION TO MOUNTED
G
/Y_
OUT
[0
..
7
]
R/
V_
OUT
[0
..
7
]
B/
U_
OUT
[0
..
7
]
CL
K
OUT
CT
L
4
OUT
CT
L
1
OUT
CT
L
0
OUT
SC
L
SD
A
S
D
RA
M_
CL
K
#
SO
F
T
_
R
ESET
DA
TA
20
DA
TA
16
DA
TA
17
DA
TA
0
DA
TA
1
DA
TA
18
DA
TA
15
DA
TA
6
DA
TA
8
DA
TA
22
DA
TA
7
DA
TA
31
DA
TA
10
DA
TA
11
DA
TA
25
DA
TA
13
DA
TA
3
DA
TA
28
DA
TA
9
DA
TA
30
DA
TA
19
DA
TA
27
DA
TA
23
DA
TA
29
DA
TA
21
DA
TA
2
DA
TA
4
DA
TA
24
DA
TA
5
DA
TA
14
DA
TA
26
A
DDR9
A
DDR10
A
DDR5
A
DDR8
A
DDR7
A
DDR0
A
DDR1
A
DDR6
A
DDR3
A
DDR4
A
DDR2
DA
TA
12
R
227
R
228
470
L
201
5.6u
H
/5%
C
211
104
C
210
104
C
212
104
MT48LC2M32B2
86 PIN TSOP
DQ0
2
DQ1
4
DQ2
5
DQ3
7
DQ4
8
DQ5
10
DQ6
11
DQ7
13
DQ8
74
DQ9
76
DQ1
0
77
DQ1
1
79
DQ1
2
80
DQ1
3
82
DQ1
4
83
DQ1
5
85
A0
25
A1
26
A2
27
A3
60
A4
61
A5
62
A6
63
A7
64
A8
65
A9
66
A1
0
24
VDD1
1
VSS1
86
VSS2
72
VSS3
58
VSSQ1
6
VSSQ3
32
VSSQ2
12
VSSQ4
38
VDD2
15
VDD3
29
VDDQ1
3
VDDQ2
9
VDDQ3
35
VDDQ4
41
VDDQ5
49
VSSQ5
46
NC3
30
NC4
57
NC5
69
NC6
70
NC7
73
BA
0
22
BA
1
23
RA
S
19
CA
S
18
CS
20
WE
17
CL
K
68
CK
E
67
NC1
14
NC2
21
DQ1
6
31
DQ1
7
33
DQ1
8
34
DQ1
9
36
DQ2
0
37
DQ2
1
39
DQ2
2
40
DQ2
3
42
DQ2
4
45
DQ2
5
47
DQ2
6
48
DQ2
7
50
DQ2
8
51
DQ2
9
53
DQ3
0
54
DQ3
1
56
DQM0
16
DQM1
71
DQM2
28
DQM3
59
VDDQ6
55
VDDQ7
75
VDDQ8
81
VDD4
43
VSSQ6
52
VSSQ7
78
VSSQ8
84
VSS4
44
U
202
M
T
48L
C
2M
32B
2
R
226
100R
L
210
L
211
T
C
205
2.2u
F
/25V
3.3V
+3
.3
V
D
3.3V
S
D
RA
M_
CL
K
DQM
CS
N
BA
0
BA
1
CA
S
N
RA
S
N
S
D
RA
M_
CL
K
#
WE
N
A
DDR[
0
..
1
0
]
D
A
T
A
[0
..31]
D
A
C
3.3V
D
A
C
1.8V
G
ND_
E
A
RT
H
CLAMP ADAPTOR TO BE USED FOR FLI2300
CHIP.
N
O DIRECT SOLDERING OF FLI2300
T
C
203
100u
F
/16V
C
217
104
C
218
104
C
227
104
C
219
104
C
229
104
C
220
104
C
214
104
C
215
1043
C
216
104
C
231
104
T
C
204
100u
F
/16V
C
233
104
C
241
104
C
213
104
C
239
104
L
208
RF
C
C
237
104
L
207
RF
C
C
235
104
C
203
104
+1
.8
V
D
+3
.3
V
A
R
V
dd c
o
re
1.8
V
dd IO
3.3V
C
206
104
C
207
104
C
208
104
YDA
T
A
7
YDA
T
A
6
YDA
T
A
5
YDA
T
A
4
YDA
T
A
3
YDA
T
A
2
YDA
T
A
1
YDA
T
A
0
R
264
0R
R
265
0R
R
266
0R
R
267
48R
R
268
48R
R
269
48R
G
ND_
E
A
RT
H
DA
C_
ROUT
DA
C_
G
OUT
DA
C_
BOUT
L
204
5.6u
H
L
203
5.6u
H
T
C
209
10u
F
/16V
+1
.8
V
D
P
LL1
.8
V
D
A
C
1.8V
1
T
P
203
OE
DCL
K
G
ND_
E
A
RT
H
GN
D
G
ND_
FI
E
L
D S
IG
N
A
L
Summary of Contents for DV985S
Page 1: ...SERVICE MANUAL DV985S...
Page 6: ...5 1 Optical pickup Unit Explosed View and Part List Pic 1...
Page 12: ......
Page 47: ......
Page 49: ......
Page 51: ......
Page 53: ......
Page 55: ......
Page 61: ......
