3.2.1 Video decode circuit principle
1. Video decode circuit is mainly composed of main decode chip Rk2608, SDRAM and peripheral
circuit. Rk2608 may realize video file decode playing of MPEG-4 format in low frequency and power
consumption with clear and smooth picture quality, meanwhile, Rk2608 integrates large amount of I/O
control jacks which may provide the max flexibility. The internal principle block diagram of Rk2608 is
shown in the picture 3.2.1.1. Low power consumption function of Rk2608 may prolong battery usage
time for portable player and its integrated intelligent lithium battery charger supports voltage control
(AVC) and its integrated power management unit includes a DC-DC converter on high effective plate,
which supports multiple battery configuration, such as 1×AA, 1×AAA and Li-ion battery. What’s more,
compared with the traditional voltage control system, AVC enables chip to operate with higher peak
value CPU working frequency to make the highest running speed up to 100 MIPS. Rk2608 supports
DRM10 digital copyright management technology based on SOFTWARE. Rk2608 with multi-function
management function, which may realize the function that listening to music while viewing e-book or
playing e-games. Rk2608 chip integrates USB 2.0 High Speed/Full Speed PHY with hugher
transmission speed and integrates the controller that supports TFT/CSTN/OLED colorful screen.
Figure 3.2.1.1 Internal principle block diagram of Rk2608
Section Two Unit Circuit Principle
- 17 -