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3. PIN Description
SYMBOL
TYPE
DESCRIPTION
CLK
Clock
The system clock input. All other inputs are registered to the SDRAM on the
rising edge of CLK
CKE
Clock Enable
Controls internal clock signal and when deactivated, the SDRAM will be one
of the states among power down, suspend or self refresh
CS
Chip Select
Enables or disables all inputs except CLK, CKE, UDQM and LDQM
BA0, BA1
Bank Address
Selects bank to be activated during RAS activity Selects bank to be
read/written during CAS activity
A0 ~ A11
Address
Row Address : RA0 ~ RA11, Column Address : CA0 ~ CA7 Auto-precharge
flag : A10
RAS, CAS, WE
Row Address Strobe, Column
Address Strobe, Write Enable
RAS, CAS and WE define the operation Refer function truth table for details
UDQM, LDQM
Data Input/Output Mask
Controls output buffers in read mode and masks input data in write mode
DQ0 ~ DQ15
Data Input/Output
Multiplexed data input / output pin
VDD/VSS
Power Supply/Ground
Power supply for internal circuits and input buffers
VDDQ/VSSQ
Data Output Power/Ground
Power supply for output buffers
NC
No Connection
No connection
3.5.2 Function introduction to RK2608
1. Features
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128 pins LQFP package
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Typical power voltage 3.3V(IO), 1.8V(Core)
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Use one 24MHz crystal oscillator
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38 GPIO (8bits P0,P1,P3,14bits P2)
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10-bit low resolution ADC with 4-channel Analog Input
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Build in Stereo 24-bit Delta-Sigma DAC with on-chip headphone amplifier
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Build in Stereo 16-bit Sigma-Delta ADC (Line-in /FM Input/ Microphone with analog mixer)
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40 levels digital volume control
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Support external CODEC through I2DSP interface
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Support I2C interface
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Support USB 2.0 high speed and full speed
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Integrated 3 Channel DMA
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Embedded DSP Core:
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4K words Boot Sync ROM