MX525D / MX525DC
4-5
Checkpoint
Description
84
Log errors encountered during POST.
85
Display errors to the user and gets the user response for error.
87
Execute BIOS setup if needed / requested.
8C
Late POST initialization of chipset registers.
8E
Program the peripheral parameters. Enable/Disable NMI as selected
90
Late POST initialization of system management interrupt.
A0
Check boot password if installed.
A1
Clean-up work needed before booting to OS.
A2
Takes care of runtime image preparation for different BIOS modules. Fill
the free area in F000h segment with 0FFh.
Initializes the Microsoft IRQ Routing Table. Prepares the runtime lan-
guage module. Disables the system con
fi
guration display if needed.
A4
Initialize runtime language module.
A7
Displays the system con
fi
guration screen if enabled. Initialize the CPU’s
before boot, which includes the programming of the MTRR’s.
A8
Prepare CPU for OS boot including
fi
nal MTRR values.
A9
Wait for user input at con
fi
g display if needed.
AA
Uninstall POST INT1Ch vector and INT09h vector. Deinitializes the
ADM module.
AB
Prepare BBS for Int 19 boot.
AC
End of POST initialization of chipset registers.
B1
Save system context for ACPI.
00
Passes control to OS Loader (typically INT19h).
