Chapter2
BIOS Setup
AGP Driving Value
While AGP driving control item set to "Manual", it allows user to set
AGP driving.
AGP Master 1 WS Write
When Enabled, writes to the AGP(Accelerated Graphics Port) are
executed with one wait states.
The choices: Disabled
(default),
Enabled.
AGP Master 1 WS Read
When Enabled, read to the AGP(Accelerated Graphics Port) are
executed with one wait states.
The choices: Disabled
(default),
Enabled.
Bank 0/1, 2/3, 4/5, DRAM Timing
The DRAM timing of Bank 0/1, 2/3, 4/5 in this field is set by the system board
manufacturer.
The Choices: Normal, Medium, Fast Turbo, SDRAM 8/10ns.
SDRAM Cycle Length
When synchronous DRAM is installed, the number of clock cycles of CAS
latency depends on the DRAM timing. Do not reset this field from the default
value specified by the system designer.
The Choices: 3
(default)
,
2, Auto.
DRAM Clock
This item determines DRAM Clock following the CPU host clock, or
The Choices: Host CLK
(default), HCLK-33M, HCLK+33M,
SPD.
P2C/C2P Concurrency
This item allows you to enable/disable the PCI to CPU, CPU to PCI concurrency.
The Choices: Disabled
(default)
,
Enabled.
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