21
3.21 System Front Panel Connectors
The HS-6050 has one IDE LED, Reset, SLP button at location
CN2.
CN2: System Front Panel Connector
PIN Description PIN Description
1
VCC
2
330
Ω
Pull +5V
3
GND
4
GND
5
N/C
6
EXT SMI
7
Speaker
8
GND
9
GND
10
Power Bottom
11
Reset Switch
12
GND
13
330
Ω
Pull +5V
14
SLPB
15
HDD LED
16
GND
1
3
5
7
9
11
13
15
2
4
6
8
10
12
14
16
PWR LED
PWR button
SLP button
EXT_SMI
HD_LED
RST_SW
SPEAKER
3.22 Watchdog Timer
There are three access cycles of Watch-Dog Timer as
Enable, Refresh
and Disable are the three access cycles of Watchdog Timer. The
Enable cycle proceeds via READ PORT 443H whereas the Disable
cycle proceeds via READ PORT 045H. A continued Enable cycle after
a first Enable cycle means Refresh.
Once the Enable cycle is active, a Refresh cycle is requested before
the time-out period. This restarts counting of the WDT period. When
the time counting goes over the period preset of WDT, it will assume
that the program operation is abnormal. A System Reset signal to
re-start or a NMI cycle to the CPU transpires when such error happens.
Jumper
JP4
is used to select the function of Watchdog Timer.
JP4
:
Watchdog Timer Active Type Setting
Options
Settings
Active NMI
Short 1-2
System Reset
Short 2-3
* Disabled Watchdog Timer
Open
Summary of Contents for HS-6050
Page 6: ...This Page is intentionally left blank...
Page 10: ...4 1 3 Board Dimensions...
Page 14: ...8 3 2 Board Layout...
