Snowball board System
Architecture and Design
48
interface and is designed specifically to reduce the pin count of discrete high-speed USB PHYs. Pin
count reductions minimize the cost and footprint of the PHY chip on the PCB and reduce the number
of pins dedicated to USB for the link controller.
Unlike full and low-speed USB systems, which utilize serial interfaces, high-speed requires a parallel
interface between the controller and PHY in order to run the bus at 480Mbps. This leads to a
corresponding increase in complexity and pin count. The ULPI used on the Snowball board keeps this
down to only 12 signals because it combines just three control signals, plus a clock, with an 8-bit bi-
directional data bus. This bus is also used for the USB packet transmission and for accessing register
data in the ULPI PHY.
8.9.3.1. A9500 Interface
The controller for the ULPI interface is the Processor. It provides all of the required signals to drive
the interface.
Table 8.1 describes the signals from the processor that are used for the USB OTG interface.
Table 8.1. A9500 ULPI Interface
Signal
Description
Type
Ball
ULPI_NXT
Dedicated for ext transceiver
Next signal from PHY
In
AF28
ULPI_STP
Dedicated for ext transceiver Stop signal
Out
AE29
ULPI_CLK
Dedicated for ext transceiver
60Mhz clock input from PHY
In
AD29
ULPI_DIR
Dedicated for ext transceiver
Data direction control from PHY
In
AC29
ULPI_DATA0
Dedicated Bidir Data bus
In/Out
AC27
ULPI_DATA1
Dedicated Bidir Data bus
In/Out
AC28
ULPI_DATA2
Dedicated Bidir Data bus
In/Out
AC27
ULPI_DATA3
Dedicated Bidir Data bus
In/Out
AE27
ULPI_DATA4
Dedicated Bidir Data bus
In/Out
AG29
ULPI_DATA5
Dedicated Bidir Data bus
In/Out
AE26
ULPI_DATA6
Dedicated Bidir Data bus
In/Out
AD26
ULPI_DATA7
Dedicated Bidir Data bus
In/Out
AD28
Summary of Contents for SKY-S9500-ULP-CXX
Page 1: ...SKY S9500 ULP CXX aka Snowball PDK SDK Hardware Reference Manual Revision 1 0 July 1 2011...
Page 3: ...SKY S9500 ULP CXX aka Snowball PDK SDK 3...
Page 17: ...Snowball board Overview 8 Figure 4 2 Snowball board Usage Scenarios...
Page 89: ...Connnector Pinouts and Cables 80 Figure 9 17 Location of R77...
Page 92: ...Mechanical Information 83 Figure 11 2 Board Mechanical drawing...
Page 93: ...Troubleshooting 84 Chapter 12 Troubleshooting 12 1 TBD TBD...
Page 94: ...Known Issues 85 Chapter 13 Known Issues TBD...
Page 96: ...PCB Component Locations 87 Figure 14 2 Snowball board Bottom Side Components...
Page 97: ...Schematics 88 Chapter 15 Schematics Figure 15 1 AB8500 1 2...
Page 98: ...Schematics 89 Figure 15 2 AB8500 2 2...
Page 99: ...Schematics 90 Figure 15 3 Power circuitry and serial port...
Page 100: ...Schematics 91 Figure 15 4 AP9500 1 4...
Page 101: ...Schematics 92 Figure 15 5 AP9500 2 4...
Page 102: ...Schematics 93 Figure 15 6 AP9500 3 4...
Page 103: ...Schematics 94 Figure 15 7 AP9500 4 4...
Page 104: ...Schematics 95 Figure 15 8 Reset circuitry and Audio in out...
Page 105: ...Schematics 96 Figure 15 9 HMDI circuitry...
Page 106: ...Schematics 97 Figure 15 10 Sensors...
Page 107: ...Schematics 98 Figure 15 11 WLAN Bluetooth GPS...
Page 108: ...Schematics 99 Figure 15 12 eMMC and microSD...
Page 109: ...Schematics 100 Figure 15 13 Expansion connector...
Page 110: ...Schematics 101 Figure 15 14 Ethernet 10 100M...