Canon 161 Calculator
Section: Notes
Page: 2
Rendition: 2022 Feb 6
Signal Names
Signal names are based on the labels on the printed circuit boards.
Section
Signal
Description
Timing
CP
Master clock.
T-…
Bit timing (4 bits constitutes a digit).
TD…
Digit timing to count out a number cycle. Clocking of the TD counter is controlled by FM.
FL
TD16 delayed one clock period.
Used in part to trigger state transitions at the end of number cycles.
Keyboard
K…
Keyboard signals.
W1,W2,W4,W8 Signals from the keyboard numeral encoder to the IR register.
Control
CC0::CC7
The states of the state machine.
F…
Flag (single-bit) registers.
F–
A subtract operation is pending or active.
FS
DIrects Arithmetic to perform subtract rather than add.
FX
A multiply operation is pending or active.
F÷
A divide operation is pending or active.
FO
Overflow / error flag.
FG
- In CC4 of multiplication, indicates shift period of final digit to adjust product.
- Indicates divide pending while dividend is shifted up.
- In division, transfers termination indication in CC4.
FH
- Used to catch an occurrence of AC=0 during CC1 for DP alignment.
FZ
- In CC3 of multiplication, indicates to add multiplicand digits of IR to ACC.
- In CC4 of multiplication, indicates to shift multiplicand digits of IR.
- In division, records termination event from CC3.
FCO
Sign from last operation-result arithmetic (out of CC3).
FCU
Sign from last totalising arithmetic (out of CC6).
FM
Controls clocking of the registers and TD,A,B,D & P Counters.
FA
Controls clocking of the A Counter.
FB
Controls clocking of the B Counter.
FD
Controls clocking of the D Counter.
FP
Controls clocking of the P Counter.
IR Register
IR…
Indicating Register. The operand being displayed.
IR
Bit stream output.
IR15D=0
IR16D=0
ACC Register ACC…
Accumulator, contains the second operand.
Arithmetic is incorporated in this register.
ACC
Bit stream output.
ACC15D=0
ACC16D=0
ME Register
ME…
User memory controlled by the A switch and T key.
ME
Bit stream output.
ME15D=0
ME16D=0
P Counter
PC…
Point Counter. Holds the position of the displayed decimal point.
PC=0
D Counter
DC…
Digit-Mark Counter. Holds the position of the multiply digit marker.
DC=0
A Counter
AC…
Counter to calculate the difference in DP positions between IR and ACC.
AC=0
B Counter
BC…
Counter to recover the DP position of a recalled operand.
BC=0
♦
A lowercase “n” in a signal name indicates the logical NOT operation.
Notes
♦
Gate symbols and signal names are presented in accordance with:
logic 0 = 0V, GND, E
logic 1 = –10V
♦
The symol
N
bbcp
denotes a physical connector pin.
bb=board, c=connector, and p=pin. Solid black end is the
male side of the connector. White end is the female side of the connector.
♦
Arrows indicate direction of signal or energy flow.
♦
The symbol
with no label denotes –10V.
♦
The symbol
with no label d10V.
♦
Capacitance in microfarads unless otherwise indicated.
♦
See the associated Theory of Operation document.
A blue dot in these drawings indicates the associated element is referenced by name in that document.
♦
Display lamps are 12V / 70mA (based on measurement).
♦
These drawings based on unit with Serial No. 700369.
Revision Log
♦
2000 Dec:
Initial drawing / bhilpert.
♦
2019 Jan:
Format revisions / bh.
♦
2021 Nov:
- Corrections re MJ: Timing diagram scale corrected, nK(E+S)-->K(E+S) at B Counter.
- Monostable diagrams reorganised / bh.
- Initial version of State Diagram added.
- Numeral-entry & addition procedure descriptions added.
- Corrections to F÷, FG, FZ flags: JK input sources were swapped.
- Correction to gate 38A20: F÷ corrected to nF÷.
♦
2021 Dec:
- Flags reorganised.
- Correction to signal direction between 36A34 & 36O20.
- DP alignment description added.
- Gate names corrected:
30O1
=> 34O9
30B5
=> 34B3
31V5
=> 34V12
34A45::49 => 37A45::49
34A47 => 36A47
A4
=> 32A11
36B6
=> 35B8
37A14
=> 34A30
