The table below lists recommended configurations. Using 5, 7, 9, 10, or 11 DIMMs
per CPU is not recommended.
Note
Table 4: DIMM Population Order
Populate CPU2 Slots
Populate CPU 1 Slot
Number of
DIMMs per CPU
(Recommended
Configurations)
Black #2 Slots
Blue #1 Slots
Black #2 Slots
Blue #1 Slots
-
(G1)
-
(A1)
1
-
(G1, H1)
-
(A1, B1)
2
-
(G1, H1, J1)
-
(A1, B1, C1)
3
-
(G1, H1); (K1, L1)
-
(A1, B1); (D1, E1)
4
-
(G1, H1); (J1, K1);
(L1, M1)
-
(A1, B1); (C1, D1);
(E1, F1)
6
(G2, H2); (K2, L2)
(G1, H1); (K1, L1)
(A2, B2); (D2, E2)
(A1, B1); (D1, E1)
8
(G2, H2); (J2, K2);
(L2, M2)
(G1, H1); (J1, K1);
(L1, M1)
(A2, B2); (C2, D2);
(E2, F2)
(A1, B1); (C1, D1);
(E1, F1)
12
• The maximum combined memory allowed in the 12 DIMM slots controlled by any one CPU is 768 GB.
To populate the 12 DIMM slots with more than 768 GB of combined memory, you must use a
high-memory CPU that has a PID that ends with an "M", for example, UCS-CPU-6134M.
• Memory mirroring reduces the amount of memory available by 50 percent because only one of the two
populated channels provides data. When memory mirroring is enabled, you must install DIMMs in even
numbers of channels.
• The NVIDIA Tesla P-Series GPU can support more than 1 TB of memory in the server. All other NVIDIA
GPUs (M-Series) can support only 1 TB or less of memory in the server.
• Observe the DIMM mixing rules shown in the following table.
Table 5: DIMM Mixing Rules
DIMMs in the Same Bank
DIMMs in the Same Channel
DIMM Parameter
You cannot mix DIMM capacities in
a bank (for example A1, B1). Pairs of
DIMMs must be identical (same PID
and revision).
You can mix different capacity
DIMMs in the same channel (for
example, A1, A2).
DIMM Capacity
For example, 8GB, 16GB,
32GB, 64GB, 128GB
You cannot mix DIMM speeds in a
bank (for example A1, B1). Pairs of
DIMMs must be identical (same PID
and revision).
You can mix speeds, but DIMMs
will run at the speed of the slowest
DIMMs/CPUs installed in the
channel.
DIMM speed
For example, 2666 GHz
Maintaining the Server
38
Maintaining the Server
DIMM Population Rules and Memory Performance Guidelines
