Fusion 878A
2.0 Functional Description
PCI Video Decoder
2.17 Asynchronous Data Parallel Mode: Raw Data Capture
100600B
Conexant
2-53
2.17 Asynchronous Data Parallel Mode: Raw
Data Capture
The asynchronous data parallel port interface allows the user to multiplex raw
data from the GPIO port into the audio packetizer. Normally, the audio processor
selects the 16-bit digitized analog data from the audio A/D and from the 16-bit
digital audio input data. By setting the DA_APP bit in Bit 5 of the Audio Control
Register (0x10C), the user may configure the part to disregard the 16-bit digital
audio data, and use either the information on GPIO [23:8] or high speed serial
mode input from the I
2
S data port, as illustrated in
In Asynchronous Data Parallel mode, the DA_APP bit switches the
functionality of the ALRCK pin. When DA_APP is high, use ALRCK to clock in
the data on GPIO [23:8]. This interface is dubbed
asynchronous
, because the
clock is not required to be continuous or fixed-rate. From the point where it is
multiplexed into the Digital Audio Packetizer, the GPIO data is treated the same
as normal audio data. From the Packetizer, data goes into a 35
×
36 FIFO, and
from the FIFO, to the PCI initiator. This mode supports input frequencies of up to
20 MBps.
This data rate is achieved by inputting 16-bit data at a frequency of 10 MHz.
Both rising and falling clock edges are used to clock in data. Thus, the maximum
allowable clock frequency on the ALRCK pin is 5 MHz. When DA_SBR is set,
only data from GPIO[15:8] will be used.
Figure 2-23. Asynchronous Data Parallel Input Multiplexer Block
Audio data A/D
DA_IOM[0]
Digita Audio In
GPIO[23:8]
High Speed Serial
DA_APP
To Audio formatter
and DMA Channel
O
1
O
1
O
1
879A_056
