No.
NAME
I/O
ASSIGNMENT
ACTIVE
CN
49
KEY IN1
I
KEY & OPTION DATA INPUT
P
50
KEY IN2
I
KEY & OPTION DATA INPUT
P
51
S0
O
SEGMENT 0
P
FLD
52
S1
O
SEGMENT 1
P
FLD
53
S2
O
SEGMENT 2
P
FLD
54
S3
O
SEGMENT 3
P
FLD
55
S4
O
SEGMENT 4
P
FLD
56
S5
O
SEGMENT 5
P
FLD
57
S6
O
SEGMENT 6
P
FLD
58
S7
O
SEGMENT 7
P
FLD
59
S8
O
SEGMENT 8
P
FLD
60
S9
O
SEGMENT 9
P
FLD
61
S10
O
SEGMENT 10
P
FLD
62
S11
O
SEGMENT 10
P
FLD
63
S12
O
SEGMENT 10
P
FLD
64
S13
O
SEGMENT 10
P
FLD
65
S14
O
SEGMENT 10
P
FLD
66
S15
O
SEGMENT 10
P
FLD
67
G0
O
GRID 0
P
FLD
68
G1
O
GRID 0
P
FLD
69
G2
O
GRID 0
P
FLD
70
G3
O
GRID 0
P
FLD
71
G4
O
GRID 0
P
FLD
72
G5
O
GRID 0
P
FLD
73
NTSC SP(H)
O
NTSC SP EE/REC MODE
H
A/V 1CHIP
74
OSC CONTROL
O
AUDIO OSC CONTROL PWR ON:H PWR OFF:L
75
Vee
-24V
76
Vcc
BACK UP 5VL
77
OSD DATA
O
OSD, SERIAL DATA OUT
SERVAL
OSD
78
OSD STB
O
OSD CHIP SELECT OUTPUT
H
OSD
79
OSD CLK
O
OSD, SERIAL CLK OUT
SERIAL
OSD
80
BIL(L)
I
BILINGUAL DATA INPUT
L
IF
81
Vcc
BACK UP 5V
82
Vret
A/D REFERENCE 5V
83
VS PWM
O
PWM OUT FOR CHANNEL SELECT DURING
P
PIF
RF MODE
84
REC SAFETY
I
REC SAFETY TAB IS DETECTED L STATE SO
L
REC SA
THAT RECOPRDING IS INHIBITED
SW
µ-COM PORT
48
Summary of Contents for DV-K*84W Series
Page 71: ...CIRCUIT DIAGRAMS 68 SECTION 9 CIRCUIT DIAGRAM 9 1 CONNECTION DIAGRAM DV K884W K484W K284W...
Page 72: ...CIRCUIT DIAGRAMS 69 9 2 POWER CIRCUIT DIAGRAM DV K884W K484W K284W...
Page 73: ...CIRCUIT DIAGRAMS 70 9 3 SYSCON AND LOGIC CIRCUIT DIAGRAM...
Page 74: ...CIRCUIT DIAGRAMS 71 9 4 PIF CIRCUIT DIAGRAM DV K884W K484W K284W...
Page 75: ...CIRCUIT DIAGRAMS 72 9 5 IF MPX MODULE CIRCUIT DIAGRAM DV K884W K484W K284W...
Page 76: ...CIRCUIT DIAGRAMS 73 9 6 VIDEO AUDIO CIRCUIT DIAGRAM DV K884W K484W K284W...
Page 77: ...CIRCUIT DIAGRAMS 74 9 7 Hi Fi PRE AMP CIRCUIT DIAGRAM DV K884W K484W K284W...
Page 78: ...DISASSEMBLY 79 SECTION 11 DISASSEMBLY 11 1 PACKING ASS Y...
