DLR-TL001 Memory Description
Quick Reference Guide
9
DLR-TL001 Memory Description
Address Space
The DLR-TL001 tag implements a standard Gen2 memory
map; it has 4 memory banks:
RESERVED
,
EPC
,
TID
and
USER
. Below is a brief explanation of the memory banks'
content (all the addresses are specified as 16-bit word
bounded):
EPC
This bank contains a 16 bit CRC-16 and a 16 bit PC field,
according to the standard, and additional 496 bits for EPC
storing. The EPC bank contains the EPC of the DLR-TL001
product, that is composed by the Datalogic company pre-
fix, the DLR-TL001 object type and a serial number. The
EPC is formatted as a SGTIN-96 code.
TID
This bank contains the Class Identifier, the Mask-Designer
Identifier, the Model Number of the chip, as requested by
the standard, plus a 32 bit long Serial Number (see below
for details) and the assembly and chip revision. Total size
of the TID field is 64 bits. The TID memory bank contains
also a 32 bit SAM field used to store the address of the
sensor characteristics table, as defined by the ISO18000
6REV1 draft standard, and additional 110 bytes for user
purposes. The TID and SAM fields are “permalocked” by
the manufacturer while the additional user space is not
locked by default, but it can be locked using the standard
Gen2 lock mechanism.
