l/O
Channel
Slots
The
l/O
channel supports:
-
Refresh
of
system
memory from
channel
or
microprocessors
-
Selection
of
data
accesses
(either 8- or 16-bit)
-
Interrupts
-
24-bit memory
addresses
(16MB)
-
l/O
wait-state generation.
-
l/O
address space
hex 100 to hex 3FF.
-
Open-bus structure
(allowing multiple micro-
processors
to
share the system’s resources,
including memory)
-
DMA
channels
The pinouts
of
the expansion bus
I/O
channels are
shown
as
below
and on the
next
page.
38
‘)
)
)
O
-MEM
0816
1
SBHE
-
l0
.
-
R01.
A
|RQ11
4
LA21
IRO12
5
LAZO
lRQ15
6
LA19
IRO14
7
LA18
D ACKO
8
LA17
DROO
9
-MEMR
-D ACK5
10
-MEMW
DRO5
11
SD08
-D ACKG
12
SD09
DRO6
13
SD10
-D
ACK7
14
$011
DRO7
15
SD12
+5VDC
16
SD13
MASTER
17
SD14
GND
18
SD15
D
Math
Coprocessor
Control
The math
coprocessor
functions
as
an
l/O
device
through l/O port
addresses
hex 0F8,
OFA
and
CFO.
The
microprocessorsends OP codes and operands
to
I/O
ports.
The
microprocessor also receives and
stores results
through
the same
l/O ports.
The
“busy"
signal
sent
by
the processor forces the microproces-
sor
to wait
until
the coprocessor
is
finished
executing.
The following
describes the
math
coprocessor
con-
trols:
0F0
The
latched
math
coprocessor busy
signal
can be
cleared
with
an
8-bit
“out"
command
to port F0. The
coprocessor
will
latch “busy”
if it
asserts
its error
signal. Data output
should be zero.
0F1
The math
coprocessor
will
reset
it
an
8-bit
“out"
com-
mand
is
sent
to port F1. Again,
the data output should
be zero.
39
Summary of Contents for Mini 80386SX
Page 1: ...o Mini 803863X 20MHz Mainboard User s Manual ...
Page 26: ......
