PSM-500/500L/500LT SCPC Satellite Modem
Description
PSM-500/500L/500LT - Rev. 0.91
Page 1-11
Transmit Clock Sources
Receive Clock Sources
Demodulator
Modulator
Receive FIFO
Buffer
DATA
CLOCK
DATA
IN
IN
OUT
OUT
DATA
Optional Reed-Solomon Decoder
& IBS Multiplexer
CLOCK
Demodulator RCV
External
Reference Input
(Rear Panel)
From Modulator
bit timing
CLOCK
Internal
Reference
Oscillator
External
Reference PLL
Terminal
Timing
Terminal
Timing
From
Interface
Demod output
clock is phase
locked to receive
bit timing
FIFO output clock selected from
"RCV Clock", "Internal", "External"
or "Mod Clock". Selection of "RCV
Clock" bypasses the FIFO buffer.
Bit Rate NCO
From
Receive
Clock
Send Data
From
Interface
Send
Timing To
Interface
Modulator bit clock source is
selected from "Internal", "Terminal
Timing", "External" or "RCV
Clock". The Send Timing is
always an output from the modem.
Receive
Data To
Interface
Receive
Timing To
Interface
External
FIFO Clock
From
Interface
Bit Rate NCO
"Internal"
External Send Timing Input
(Rear Panel)
Figure 1-3 Clock Source Options
These Clock sources may be used in various ways in a system implementation to provide correct
timing at a destination. Each of the clock sources can be set either from the front panel or from an
external monitor and control system.
