D i d o H a r d w a r e M a n u a l
v . 1 . 0 . 5
5
System Logic
5.1
Power
Implementing correct power-up sequence for AM387x/DM814x
processor is not a trivial task because several power rails are
involved. DIDO hides this complexity because it embeds most
of the circuitry required.
In typical applications AM387x/DM814x processor interfaces
directly to 3.3V-powered devices that are hosted on carrier
board. In order to be compliant with AM387x/DM814x
power-up requirements, these devices should be turned on at a
specific time during power-up sequence. To achieve this, DIDO
provides EN_BCK2_LS signal. When DIDO is powered, this
signal is low: this means that carrier board 3.3V-powered
devices have to be powered off. During power-up sequence this
signal shall be raised by DIDO circuitry, indicating carrier
board 3.3V-powered devices have to be turned on. After this
rising edge, EN_BCK2_LS shall be kept high.
5.2
PMIC
This section will be completed in a future version of this
manual.
5.3
Reset
Five different signals are provided by DIDO SOM. Following
sections describes in more detail each one.
5.3.1
MRST (J2.102)
This pin is connected to HDRST signal (cold reset) of PMIC
TPS659113. When high, this signals keeps PMIC in off mode
and resets TPS659113 to default settings. MRST has a weak
internal pulldown.
5.3.2
PORSTn (J2.109)
PORSTn is a bidirectional open-drain signal. It is connected to:
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