D i d o H a r d w a r e M a n u a l
v . 1 . 0 . 5
Pin name
Conn.
Pin
Function
Notes
VIN[0]A_D[14]_BD[6]
J1.20
VIN[0]A_D[15]_BD[7]
J1.24
VIN[0]A_D[16]
J1.23
VIN[0]A_D[17]
J1.25
VIN[0]A_D[18]
J1.27
VIN[0]A_D[19]
J1.29
VIN[0]A_D[20]
J1.31
VIN[0]A_D[21]
J1.33
VIN[0]A_D[22]
J1.92
VIN[0]A_D[23]
J1.94
7.4.2
VIN1
The following table describes the interface signals:
Pin name
Conn.
Pin
Function
Notes
VIN[1]A_CLK
J1.134
Input clock for
8-bit, 16-bit, or
24-bit Port A video
capture.
Input data is
sampled on the
CLK0 edge.
VIN[1]A_VSYNC
J2.113
Discrete vertical
synchronization
signal for Port A
YCbCr capture
modes without
embedded syncs
(“BT.601” modes).
VIN[1]A_HSYNK
J1.117
Discrete horizontal
synchronization
signal forPort A
YCbCr capture
modes without
embedded syncs
(“BT.601” modes).
VIN[1]A_DE
J2.119
Discrete data valid
signal for Port A
RGB capture mode
August, 2014
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