PowerConnect B-MLXe Hardware Installation Guide
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Performing a Hitless OS upgrade
6
Performing a Hitless OS upgrade
NOTE
Note: Hitless upgrades are supported for upgrades within a major release (for example, 05.1.00 to
05.1.00a) but are not supported for upgrades from one major release to another (for example 5.1.0
to 5.2.0.)
Some features and protocols are not supported for hitless upgrade. Before you perform a hitless
upgrade, refer to “Hitless OS Upgrade” for more information.
A Hitless OS Upgrade loads from the primary and secondary images on the management modules.
To do a Hitless OS Upgrade, perform the following steps:
1. Copy the Multi-Service IronWare software images to the primary and secondary flash on the
active and standby management modules and on interface modules.
2. Set up a console connection to both the active and standby management modules. These
connections can be serial console sessions or sessions established through Telnet or SSH.
3. Enter thehitless-reload command at the console of the active management module.
hitless-reload mp [primary | secondary] | lp [primary | secondary]
The mp parameter specifies that the image will be copied to the
management module
.
The lp parameter specifies that the image will be reloaded to the
interface module.
Performing an image coherence check
When you enter the reload-check command, Multi-Service IronWare software performs a
coherence check to ensure that compatible versions of the software are installed on management
and interface modules, and that all interface module FPGAs are compatible with the current
software version. If incompatible images are discovered, a warning message is sent.
The image coherence check is performed in the following sequence:
1. Check management module and interface module application images for compatibility
•
Checks for compatibly of interface module application images on management and
interface modules.
•
Checks for compatibly of interface module monitor images on management and interface
modules.
2. Checks the interface module monitor image on the management module and all interface
modules
3. Checks the management module monitor image for compatibility with the management
module application image.
4. Checks the interface module monitor image for compatibility the management and interface
module application images.
5. Checks all interface module FPGAs for compatibility with the application image. FPGAs include
CPP, PBIF, XGMAC, STATS, XPP-OC, PBIF-OC, STATS-OC.
If step 1 does not succeed, verification is stopped and a warning is issued. If step 1 succeeds, the
rest of the checks are conducted in parallel.
Summary of Contents for PowerConnect B - MLXe 16
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