73
TC94A92FG Block Diagram
TC94A92FG
2009-05-27
4
Block Diagram
PWM
5bit DAC
D
ig
it
al
e
qu
al
iz
e
r
A
u
to
m
at
ic
a
dj
us
tm
en
t
c
ir
c
ui
t
ROM
R
A
M
Synchronous
guarantee EFM
decoder
E
rr
o
r
C
o
rr
ec
ti
o
n
A
d
dr
e
ss
Subcode
decoder
Audio out
Digital out
C
L
V
se
rv
o
Tracking
Error
(TE&SBAD)
Focus
Error
(FE)
RF
Auto laser
Power Cont.
(APC)
Reference
Voltage
gene.(VRO)
Auto Gain
Cont.(AGC)
DC level
DET(RFDC)
VREF
PVREF
TNi
TPi
FPi1
FPi2
FNi1
FNi2
T
R
o
D
M
o
F
M
o
F
o
o
F
S
M
o
N
iT
(F
E
i/
S
B
AD
/
R
F
D
C)
1
0
bi
t
A
D
C
MDi
LDo
RFEQo
AGCi
RF Ripple
DET.(RFRP)
RFRPi
VRo
R
FR
P
R
F
R
P
SBAD
RF
D
C
FEI
TEI
Reference
Voltage(APC)
Bias circuit
R
F
Z
i
RESiN
RVSS3
RVDD3
PLL
TMAX
VCO
E
F
M
s
lic
er
+
-
PVREF
T
M
A
X
P
D
o
L
P
F
N
L
P
F
o
PVREF
V
C
o
F
P
V
R
E
F
A1
MX
MY
MZ
MAC
A0
AY
AX
A2
register
X0/X1/X2
Y0/Y1/Y2
ALU
Bus
Switch
C-Pointer
register
Y-Pointer
register
A3
X-Pointer
register
Address Calc.
2sets
YRAM
4kw
(24bit)
X-Bus
Y-Bus
40bit
XRAM
4kw
(24bit)
ERAM
4kw
(24bit)
CROM
4kw*11=44kw
(24bit)
PRAM
1024w
(40bit)
PROM
4kw*9=36kw
(40bit)
G
en
er
al
I/
O
I/
F
SRAM I/F
SRAM
512kbit
(4kw*128bit)
MCU I/F
P
io
0
-
7
In
tru
pt
C
on
t.
IR
Q
Program
Control
Instruction
Decoder
round & limit
round & limit
TEi
VREF
+
-
+
-
4KB SRAM
C
o
n
tr
o
l
S
e
rv
o
A
V
S
S
3
A
V
D
D
3
IP
/
A
T
T
V
D
D
M
1
Resume
VDD1
VSS1
RFo
IO
_C
T
R
DCoFC
RF-EQ
V
C
o
i
For
DSP
T
E
Z
I
F
M
o
S
RFRP
FEI
SRAM
512kbit
(4kw*128bit)
/
S
R
A
M
S
T
B
Pio0
Pio7
Pio6
Pio5
Pio4
Pio3
Pio2
Pio1
T
E
S
T
/
R
S
T
DSP-VCO
SLCo
RFi
M
S
/C
C
E
BU
C
K
/
C
L
K
/
S
C
L
BUS
3
/
S
i
/
SD
A
BUS
2
/
S
o
BU
S
1
/
M
S
2
B
U
S
0
/
P
io
1
5
V
D
D
3
V
D
D
1
V
S
S
1
O
S
C
C
lo
ck
G
en
F
o
r
C
D
/
D
A
C
16
.9
M
H
z
XVDD3
XVSS3
M
ul
ti
-b
it
Δ
Σ
D
A
c
o
n
ve
rt
e
r
DVSS3L
Lo
DVDD3L
DVDD3R
Ro
DVSS3R
P
io
9
P
io
11
P
io
8
P
io
10
C
D
M
o
N
0
C
D
M
o
N
1
C
D
M
o
N
2
C
D
M
o
N
3
V
S
S
1
V
D
D
1
General I/O
I/F
Pio8-14
IO_CTR
CD monitor
DF
To AudioDAC
Equalizer Output Control
Stepping
Motor
Control
I2C
UART
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