Denon DN-X300, Service Manual

8

DN-X300

33

D14

D6

D/I

-

-

-

-

-

Data bus

34

D15

D7

D/I

-

-

-

-

-

Data bus

35

Vcc

Vcc

-

-

-

-

-

-

Power 5V)

36

A0

A0

A/O

-

-

-

-

-

Address bus

37

A1

A1

A/O

-

-

-

-

-

Address bus

38

A2

A2

A/O

-

-

-

-

-

Address bus

39

A3

A3

A/O

-

-

-

-

-

Address bus

40

A4

A4

A/O

-

-

-

-

-

Address bus

41

A5

A5

A/O

-

-

-

-

-

Address bus

42

A6

A6

A/O

-

-

-

-

-

Address bus

43

A7

A7

A/O

-

-

-

-

-

Address bus

44

Vss

Vss

-

-

-

-

-

-

GND(0V)

45

A8

A8

A/O

-

-

-

-

-

Address bus

46

A9

A9

A/O

-

-

-

-

-

Address bus

47

A10

A10

A/O

-

-

-

-

-

Address bus

48

A11

A11

A/O

-

-

-

-

-

Address bus

49

A12

A12

A/O

-

-

-

-

-

Address bus

50

A13

A13

A/O

-

-

-

-

-

Address bus

51

A14

A14

A/O

-

-

-

-

-

Address bus

52

A15

A15

A/O

-

-

-

-

-

Address bus

53

A16

A16

A/O

-

-

-

-

-

Address bus

54

A17

A17

A/O

-

-

-

-

-

Address bus

55

P52

_FX1ON

O

-

ON

-

L

H

PGM1 EFFECT LOOP enabler   'L' : enabler   (DN-X300 only)

56

P53

_FX2ON

O

-

ON

-

L

H

PGM2 EFFECT LOOP enabler   'L' : enabler   (DN-X300 only)

57

Vss

Vss

-

-

-

-

-

-

GND(0V)

58

P60

LEDFX1

O

-

-

Pu

L

H

PGM1 EFFECT LOOP LED control.     (DN-X300 only)

59

P61

LEDFX2

O

-

-

Pu

L

H

PGM2 EFFECT LOOP LED control.     (DN-X300 only)

60

P62

FX1SW

I

-

-

-

L

H

PGM1 EFFECT LOOP ON/OFF SW   'L' : ON   (DN-X300 only)

61

P67

P67

I

-

-

-

H

H

DN-X100/300 program selected Pin   'L' : DN-X300

62

_STBY

_STBY

-

-

-

-

-

H

When driven low,this pin forces a transition to hardware standby mode.

63

_RES

_RES

-

-

-

-

-

-

Reset signal        'L' : Reset 

64

NMI

NMI

I

-

-

Pu

-

H

Not used

65

Vss

Vss

-

-

-

-

-

-

GND(0V)

66

EXTAL

EXTAL

-

-

-

-

-

-

OSC 16MHz

67

XTAL

XTAL

-

-

-

-

-

-

OSC 16MHz

68

Vcc

Vcc

-

-

-

-

-

-

Power 5V)

69

_AS

_AS

-

-

-

-

-

-

Not used

70

_RD

_RD

O

-

-

-

-

-

Goes low to indicate reading from the external address space

71

_HWR

_HWR

-

-

-

-

-

-

Not used

72

P66

JDET

I

-

-

-

L

H

Check Send Return jack inserted   

73

MD0

MD0

I

-

-

-

-

-

IC Operating mode control  

74

MD1

MD1

I

-

-

-

-

-

IC Operating mode control  

75

MD2

MD2

I

-

-

-

-

-

IC Operating mode control  

76

Avcc

Avcc

-

-

-

-

-

-

Power supply pin for the A/D conv5V).

77

Vref

Vref

-

-

-

-

-

-

Reference voltage input pin for the A/D conv5V).

78

P70,AN0

CH1FADER

I

-

-

-

-

Hi-z CH1 FADER VR A/D converter

79

P71,AN1

CFFADER

I

-

-

-

-

Hi-z CROSS FADER VR A/D converter

80

P72,AN2

CH2FADER

I

-

-

-

-

Hi-z CH2 FADER VR A/D converter

81

P73,AN3

CH1CUREV

I

-

-

-

-

Hi-z CH1 FADER CONTOUR VR A/D converter

82

P74,AN4

CFCUREV

I

-

-

-

-

Hi-z CROSS FADER CONTOUR VR A/D converter

83

P75,AN5

CH2CUREV

I

-

-

-

-

Hi-z CH2 FADER CONTOUR VR A/D converter

84

P76,AN6

AN6

I

-

-

-

-

Hi-z Not used

85

P77,AN7

AN7

I

-

-

-

-

Hi-z Not used

86

Avss

Avss

-

-

-

-

-

-

Ground pin for A/D converters(0V).

87

P80

P80

O

-

-

Pu

L

L

Not used

Pin 
No.

Pin Name

Symbol

I/O

Det Int Pu Ext Res

Ini

Function