connectionS and PortS
24
4
3
2
1
Fig. 11: Output settings
Counter and digital I/O
FPGA
PCIe
100 k
100 k
5 V
5 V
Input_A
Input_B
Input_Z
DI
1 to 8
23 k
3
8
4
23 k
Digital_Input
Digital_Output
High: >2.0 V
Low: <0.8 V
High: >2.0 V
Low: <0.8 V
5 V
AUX
D-SUB-25
GND
GND
High: >2.3 V
Low: <0.8 V
5 V
DO
1 to 4
GND
GND
High: >2.3 V
Low: <0.8 V
Fig. 12: Counter and digital I/O