UM-B-114
DA14531 Development Kit Pro Hardware User Manual
User Manual
Revision 1.4
23-Apr-2020
58 of 82
© 2021 Dialog Semiconductor
Appendix B WLCSP17 PRO-DB: DA14531-00OGDB-P_(376-05-E)
B.1
Schematic
Figure 58: Schematic, WLCSP17, DA14531-00OGDB-P_(376-05-E)
SC
LK
Z6
0.
5pF
R
22
0
P0_2
P0_5
Z1
1.
8pF
R
ESET
U
R
T
S
M
OSI
M
B2_3
BYPASS
M
B2_3
1
-W
IR
E
U
A
R
T
(2
)
U
T
X
VBAT
VBAT
S
W
1
J
S203011
J
C
QN
4
3
2
6
7
8
1
5
P0_5
4
-P
IN
U
A
R
T
M
B2_4
R2
36
NOTE: V3 of PRO-MB is renamed to VBAT on DB and is connected to VBAT_HIGH of DA14531 V1 of PRO-MB is renamed to VL+ on DB and is connected to VBAT_Low of DA14531
M
B2_0
P0_3
P0_4
M
B2_2
RF1
VH
-
R
23
NP
R
28
NP
P0_3
(B
)
SW
C
LK
M
B2_1
R
30
1.
00K
M
B0_5
M
B0_5
M
B0_5
Z3
1.
8pF
M
B2_2
VL+
M
B0_0
M
B2_5
Z9
10pF
M
B2_0
SW
D
IO
M
B2_2
(def
ault
)
M
B2_1
R
35
NP
P0_2
SW
D
IO
VLD
O
BT
1
N
P_BC
2032-F
1
R3
36
1
.1
V
L
D
O
M
B0_7
P0_0
R
33
NP
C
S#
VL+
URX
R
24
NP
R
29
NP
J
1
A
PC
IE_64
A1
A1
A6
A6
B9
B9
B10
B10
B13
B13
B14
B14
A24
A24
B28
B28
B30
B30
A10
A10
A11
A11
A12
A12
B32
B32
A14
A14
A15
A15
A16
A16
A17
A17
A18
A18
A19
A19
A20
A20
A21
A21
A22
A22
B17
B17
B1
B1
A25
A25
B20
B20
B16
B16
B11
B11
B31
B31
B24
B24
A31
A31
A32
A32
P0_0
R
19
0
Y2
N
P_32.
768KH
Z
R
ESET
L1
2.
2uH
R
ST
R
14
0
Z7
NP
VH
+
M
B2_1
M
B0_6
BO
O
ST
P
O
W
E
R
M
O
D
E
S
E
L
E
C
T
IO
N
D
E
F
A
U
L
T
B
Y
P
A
S
S
(
B
)
D
A
1
4
5
3
1
1
7
-b
a
ll
W
L
C
S
P
U1
D
A14531-W
LC
SP17
X
T
AL32M
m
E1
R
F
IOm
A3
R
F
IOp
A1
GND
_DC
DC
F2
X
T
AL32M
p
D2
P0_1
E5
P0_0/
R
ST
F4
P0_2/
SW
C
LK
C5
P0_3/
X
T
AL32k
p
B4
GND
_RF
2
C1
P0_4/
X
T
AL32k
m
A5
P0_5/
SW
D
IO
D4
Lx
G3
VBAT_LOW
G1
VSS
E3
VBAT_H
IGH
G5
GND
_RF
1
C3
C
U
R
R
E
N
T
M
E
A
S
U
R
E
M
E
N
T
R
34
NP
VL+
VH
+
(L
)
R4
36
Z5
5.
6nH
M
B0_6
M
B2_0
RF3
M
B0_0
M
B0_3
Ca
rd Ed
ge
C
on
ne
cto
r (PC
I-E)
BR
EA
KO
UT
H
EA
DE
RS
C2
10uF
SW
C
LK
M
B0_5
R
25
NP
P0_0
VL+
J
1
B
PC
IE_64
B15
B15
A28
A28
B3
B3
B18
B18
B22
B22
B19
B19
A27
A27
B26
B26
B12
B12
B4
B4
B5
B5
A5
A5
B6
B6
B7
B7
A7
A7
A8
A8
A9
A9
B25
B25
A26
A26
B27
B27
A29
A29
A4
A4
B8
B8
A13
A13
A23
A23
B23
B23
B29
B29
A30
A30
B2
B2
A2
A2
A3
A3
B21
B21
M
B2_3
R
20
0
RF2
3rd order Chebyshev Low Pass Filter
M
B2_0
M
B0_6
VH
+
BU
CK
JT
AG
M
ISO
VBAT
VLD
O
M
B2_4
M
B2_0
VL-
U
C
T
S
J3
N
P_142-076
1-861
1
2 3 4
M
B0_4
C6
NP
Y1
32.
0000M
H
Z
1
3
2
4
R5
36
M
B2_3
VI
N
C3
1.
0uF
R
15
36
P0_5
SP
I
FL
AS
H
C1
2.
2U
F
R
26
NP
M
B2_5
VH
+
A
N
T
1
Ant
enna_I
F
A_t
y
pe_R
ight
VL-
M
B0_5
Z4
1.
00pF
R
21
0
Z2
3.
3nH
VL-
M
B0_3
C5
NP
P0_1
VI
N
M
B0_7
P0_5
P0_1
(H)
T
it
le
:
D
oc
.
N
r.
R
ev
:
D
at
e:
Sheet
:
of
Dialog Semiconductor N.E.O. Athinon- Patron 15 26441, Patra, Greece tel. (+30) 2610390940 fax. (+30) 2610390941
D
es
igner:
376-05-E
E
D
A
14531/
D
2632
D
evel
o
p
men
t
K
it
D
au
g
h
ter
b
o
ar
d
2
2
F
riday
,
Augus
t
09,
2019
PR
<
Variant
N
am
e>
M
B0_4
P0_4
M
B0_4
J2
M
20-889054
5R
VH
-
M
ISC
.
PER
IPH
ER
A
L
S
M
B2_4
M
B2_4
C7
NP
R1
36
R6
NP
VH
-
C4
1.
0uF
M
B2_1
(opt
.1)
T
P1
R
ST
R
27
NP
U2
T
C
R
2EF
11_LM
_C
T
IN
1
GN
D
2
CE
3
NC
4
OU
T
5