Elton User Manual Rev 1.04
Page 60
The image below depicts the screen dump of a programmed PTN for M215HTN01.1 LCD with dual-channel
at 1920x1080 resolution.
Figure 17.1-1: Screen Dump PTN for M215HTN01.1 LCD Display with Dual Channel
The registers for Read and Write operations for the LVDS bridge IC PTN3460 device and the baseboard are
addressable at a range of Type Values 0x80-0x8F.
NOTE
: It is recommended to compare all registers ranging from 0x80 to 0x8F and program the PTN3460
chip accordingly.
Once the programming is complete, the PTN3460 chip must be flashed. To execute flashing the following
sequence must be used, where the Default Values must be replaced with the Offset (Hex) Values as
specified in the table below.
Default
Value
Offset
(HEX)
Size
(bytes)
Name
Bit
Field
Note
0xE8
0x01
1
Flash Command
7:0
Flash Operation to be Executed (Default 0)
0
‐
Erase Only
1
‐
Erase and Flash
0xE9
0x78
2
Flash Magic
Number
7:0
Must be Equal to 0x7845 for Flash Command
to be Processed (Big Endian) (Default 0)
0xEA
0x45
The 0xEA is a Hexadecimal format error code used
to identify the error caused.
The 0x45 is an error-diagnostic scan code.
0xEB
0x56
1
Flash Trigger
7:0
Must be Equal to 0x12345678 for PTN3460 to
Consider Flashed Configuration Table (Big Endian)
(Default 0)
