Hercules-EBX CPU User Manual V1.02
Page 113
Channel C bit 5 as well as to an LED. If “TOUT1” function is required, then the two
attached DIO signals (D bit 5 and C bit 5) must be configured as inputs. “TOUT1” is
also tied to a test point (TP1-pin6) for probing.
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DIOLATCH / ACK – The “LATCH” signal is multiplexed with DIO Channel E Bit 6.
The output is connected directly to the dedicated “ACK” signal via SW1-switch 4, so
DIO feedback can be directly supported for testing. If this is selected, SW1-switch 3
should be set “OFF” to avoid conflicts (DIO C/D bit 6 unintentionally driving
DIOLATCH).
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EXTTRIG – This is a dedicated input signal which is used for latching data or as a
clock or pulse source for the internal counter 1. This is connected directly to a test
point (TP1-pin 10), Channel A bit 0, Channel B bit 0, as well as two switches :
i. SW1-switch 3 which routes EXTTRIG to DIO E5 / TOUT1
ii. SW1-switch 4 which routes EXTTRIG to TOUT0
There are several ways to test EXTTRIG, given these connections:
i. Use TOUT0 to drive EXTTRIG. In this case, SW1-switch 3 should be
“OFF”, SW1-switch 4 should be “ON”, DIO ports A and B should both be
configured as INPUT, and TOUT0 should be configured to generate the
desired output.
ii. Use TOUT1 to drive EXTTRIG. In this case, SW1-switch 3 should be
“ON”, SW1-switch 4 should be “OFF”, DIO ports A and B should both be
configured as INPUT, and TOUT1 should be configured to generate the
desired output (making sure that DIO Channel E7-4 are configured for
alternate functions).
iii. Use DIO A bit 0 to drive EXTTRIG. In this case, SW1-switch 3 should be
“OFF”, SW1-switch 4 should be “OFF”, DIO port B should both be
configured as INPUT, and DIO port A should be configured as OUTPUT.
Data written to DIO port A, bit 0 would then control the EXTTRIG function.
iv. Use DIO B bit 0 to drive EXTTRIG. In this case, SW1-switch 3 should be
“OFF”, SW1-switch 4 should be “OFF”, DIO port A should both be
configured as INPUT, and DIO port B should be configured as OUTPUT.
Data written to DIO port B, bit 0 would then control the EXTTRIG function.
v. Use external trigger source. In this case, SW1-switch 3 should be “OFF”,
SW1-switch 4 should be “OFF”, DIO ports A and B should both be
configured as INPUT, and DIO port B should be configured as OUTPUT.
The external trigger source should be connected via TP1-pin 10.
•
Pulse-Width Modulation Output – There are 4 channels of PWM output that can be
independently controlled. These four channels are present on Channel E bits 3-0
when the PWM functions are enabled. Frequency and duty cycle can be varied for
each channel.
NOTE: Be certain that the DIP switches for the DIOLATCH / ACK handshaking are correctly
configured on the DAQ Test Board before beginning any testing of these functions. If a DIO is
inadvertently connected to this lookback, anomalous behavior may result. As mentioned above for
LATCH / ACK testing, SW1 – switch 4 should be set “ON” and SW1-switch 3 should be set “OFF”.