Hercules-EBX CPU User Manual V1.02
Page 27
4.18 LCD Panel (LVDS Interface) Connector – J24
Ground
1
2
Ground
Y CLOCK -
3
4
Z CLOCK -
Y CLOCK +
5
6
Z CLOCK +
Ground
7
8
Ground
Y Data 0 -
9
10
Z Data 0 -
Y Data 0 +
11
12
Z Data 0 +
Ground
13
14
Ground
Y Data 2 -
15
16
Z Data 1 -
Y Data 2 +
17
18
Z Data 1 +
Ground
19
20
Ground
Y Data 1 -
21
22
Z Data 2 -
Y Data 1 +
23
24
Z Data 2 +
Ground
25
26
Ground
VDD (LCD Display)
27
28
VDD (LCD Display)
VDD (LCD Display)
29
30
VDD (LCD Display)
Table 19: J24 – LCD Connector Pinout
J24 provides access to the internal LVDS LCD display drivers. Note that the LCD also requires
the backlight to be connected (J28 below) in order to function correctly.
Signal Name
Definition
Y Data 2-0 +/-
Primary Data Channel, bits 2-0 (LVDS Differential signaling)
Y Clock +/-
Primary Data Channel, Clock (LVDS Differential signaling)
Z Data 2-0 +/-
Secondary Data Channel, bits 2-0 (LVDS Differential signaling)
Z Clock +/-
Secondary Data Channel, Clock (LVDS Differential signaling)
VDD
+3.3V Switched Power Supply for LCD display (only powered up when
LCD display is active)
Ground
Power Ground, 0V
Connector Part Numbers
J24 plug on CPU board:
JST Part Number: BM30B-SRDS-G-TF
Cable-mount socket:
JST Part Number: JST SHDR-30V-S-B
4.19 VGA Connector – J25
RED
1
2
R-Ground
GREEN
3
4
G-Ground
BLUE
5
6
B-Ground
HSYNCH
7
8
DDC-Data
VSYNCH
9
10
DDC-Clock
Table 20: J25 – VGA Header Pinout
Signal Name
Definition
RED
RED signal (positive, 0.7Vpp into 75 Ohm load)
