dimtel
dimtel
Specifications
Table 2: High-speed ADC and DAC specifications
Parameter
Definition
ADC inputs
2 complementary
ADC input full scale sensitivity
200 mV peak-to-peak (
−
10 dBm)
ADC resolution
8 bits
ADC input bandwidth
1.26 GHz
DAC outputs
2 complementary
500 mV peak-to-peak (
−
2 dBm)
DAC resolution
12 bits
under 250 ps
under 350 ps
Table 3: FIR filter control
Parameter
Definition
Coefficients
16 bit wide in Q15 format
Coefficient sets
2
Coefficient set select
0 or 1
FIR channel enable control
On/Off
Shift gain
0 to 7
Downsampling
1 to 32
Table 4: Control parameters
Parameter
Definition
One-turn delay adjustment
T
RF
per step, up to one revolution
DCM reset
Control panel pushbutton
DCM phase
−
180 to 180 degrees in 256 steps
Clock and fiducial delays
4 channels
Clock and fiducial delay step
10 ps
Clock and fiducial delay range
0–10.23 ns
General-purpose analog outputs
7 channels
High-speed DAC offset adjust-
ment
1 channel
General-purpose digital outputs
32 inputs/outputs
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