WJ-8611 DIGITAL VHF/UHF RECEIVER
CIRCUIT DESCRIPTIONS
5-15
This is an analog voltage line that ranges from 0 to +3 Vdc at TP69. It is
scaled prior to being output to provide a voltage ranging from 0 to +5 Vdc
at pin 10 of J1. The serial data and timing lines are shared by all of the
control registers for the synthesizers and the preselector, in the RF Tuner
Assembly (A3). The control processor transfers the control data as a series
of data blocks (RFB DATA, J1, pin 20) that are clocked into the data
registers of the RF Tuner Assembly (A3) by the RFB CLK signal (J1, pin
19). The data clock is a sequence of 8-bit clock bursts that synchronize the
data transfer. When a data transfer is complete, the RFB STB data strobe
line forces the intended data register in the RF Tuner Assembly (A3) to
accept the data. The data is directed to the appropriate data register by the
RFB A0/ A1/ A2 parallel control lines. Each time data is transferred, the
binary address on these lines determines which register receives the data.
Refer back to
Table 5-4
for specific details regarding control data transfer.
Table 5-5. Configuration Switch Summary
Switch Function
S1 -1
Configuration Mode:
Normal - Up
Configuration - Down
S1 -2
Not Used
S1 - 3
Not Used
S1 - 4
Front Panel Recognition
Front Panel Present - Up
No Front Panel Present - Down
S1 - 5
Not Used
S1 - 6
IEEE-488 Address Update:
Front Panel Update Enabled - Up
Front Panel Update Disabled - Down
S1 - 7
Not Used
S1 - 8
Not Used
S2 - 1 to 5
IEEE-488 Bus Address (0 -30)
S2 - 6
Not Used
S2 -7
Interface Type:
RS-232 - Up
IEEE-488 - Down
S2 - 8
RS-232 Baud Rate:
User Defined - Up
9600 - Down
Courtesy of http://BlackRadios.terryo.org
Summary of Contents for WJ-8611
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