WJ-8611 DIGITAL VHF/UHF RECEIVER
4-26 REMOTE
CONTROL
Table 4-4. Status Byte Register, Bit Evaluation
Bit Mnemonic
Description
00
RSB
Receiver Status Bit - This bit, when set, indicates
that an event has caused one or more bits in the
Receiver Status Register to be set. This bit is
cleared by *CLS or by reading the contents of the
Receiver Status Register (RSR?)
01 - 03
Not Used
04
MAV
Message Available Bit - This bit is set when a
message is available for transmission to the
Controlling device.
05
ESB
Event Summary Bit - This bit is set when one or
more bits in the Events Summary Register are set
and the associated bit(s) in the Event Summary
Enable Register are set.
06
RQS
Request Service Bit - This bit, when set, indicates
that the unit has asserted service request (SRQ).
07 Not
Used
4.6.2 EVENT SUMMARY STATUS REGISTER
The following paragraphs detail the function and use of the Event
Summary Register and the *ESR? query.
Table 4-5
provides the bit
evaluation of this register and defines the bit functions.
The Event Summary Register is read destructively by the *ESR? query,
which clears the register. The *CLS command also clears the register.
The power-up sequence of the receiver automatically sets the Power On bit
(PON), and resets the remaining bits.
The Event Summary Enable Register allows the event flags of the Event
Summary Register to be reflected in the ESB bit of the Status Byte
Register. Setting an event flag is reflected in the ESB bit only if the
corresponding bit in the Event Summary Enable register is set. The Event
Summary Enable Register bits are set with the *ESE command. The
argument following the command is the decimal equivalent of the binary
value that determined each bits status. The *ESE? query returns a decimal
value that reflects the current setting of the Event Summary Enable
Register.
Courtesy of http://BlackRadios.terryo.org
Summary of Contents for WJ-8611
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