E
ffective 8/13/99
Page 16
I.L. 70C1037H02
Figure 3.1 Digitrip DT20 Block Diagram with Breaker Interface
(Load/Low e r)
(L ine/U ppe r)
N
A
B
C
A U X C Ts
R esid ual
G roun d
D etection
Typical P hase or
G roun d S e nsing
R esistor
B ridg e
C ircuits
In terna l
P ow e r
Su pply
M akin g C urrent
R e lease C ircuitry
(S ee S e ctio n 3.3 )
Trip
Actuator
LE D
P u lse
C ircuit
Ba ttery
+ 3V
G roun d A la rm /
Po w er S up ply
(O ption a l fo r 5 20 M )
FE T
Trip
(Se e Se ction 1 .2)
Trip LE D
R ating P lug
In tegrate d
C ircuit
S R E +C hip
µ
T M
C ustom
D esign ed
TA
Status L ED
(Se e Se ction 3 .2)
(Se e Se ction 7 )
(S ee S ec tion 2.3)
(See Sec tion 3.4 )
Z one In terlock
C ircuitry
D isplay for 5 20M
ZIn
Z O ut
C urren t S ensors
(Se e Se ction 8)
(Se e Se ction 4 )
Input Se tting
4 bit
Latch
C hip
Courtesy of NationalSwitchgear.com