1 Description ESR5-BWS-31-24VDC
13
ESR5-BWS-31-24VDC
11/23 MN049020EN Eaton.com
1.12 Block diagram
Figure 5:
Block diagram
Isolation co-ordination
Enclosure
material
A1/A2, Logic 13/14
23/24
33/34
41/42
Enclosure
material
-
4 kV BI
4 kV BI
4 kV BI
4 kV BI
4 kV BI
A1/A2, Logic
-
-
6 kV ST
6 kV ST
6 kV ST
6 kV ST
13/14
-
-
-
4 kV BI
4 kV BI
4 kV BI
23/24
-
-
-
-
4 kV BI
4 kV BI
33/34
-
-
-
-
-
4 kV BI
41/42
-
-
-
-
-
-
Legend: BI - basic insulation, ST - safe isolation
￫
Basic insulation
(rated surge voltage 4 kV)
Mixing low voltage and SELV is not permissible. Connect
250 VAC to one of the enable contacts only if the neighboring
contact/enable current path is also carrying the same potential.
Safe isolation / reinforced insulation
(rated surge voltage 6 kV)
The reinforced insulation is designed one overvoltage category
higher than the basic insulation (e.g., with greater clearances
and creepage distances for the conductors). Accordingly, mixing
SELV circuits with V
≤
25 VAC or V
≤
60 VDC and circuits with a
higher voltage is possible.
S11
Logic
A1
K1
13
23
33
41
A2
14
S35
S33
24
34
42
Power
24 V DC
24 V DC
K2
S12 S22
S34
Designation
Explanation
A1
Power supply 24 VDC
A2
Power supply 0 V
S11, S12, S22
Sensor circuit input
S33, S34, S35
Start circuit
13/14
Enable current paths, non-delayed 1
23/24
Enable current paths, non-delayed 2
33/34
Enable current paths, non-delayed 3
41/42
Signal current path, non-delayed
